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LTC4449 Datasheet(PDF) 61 Page - Linear Technology

Part # LTC4449
Description  Dual Output PolyPhase Step-Down DC/DC Voltage Mode Controller with Digital Power System Management
PDF  108 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC4449 Datasheet(HTML) 61 Page - Linear Technology

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LTC3882-1
61
Rev A
For more information www.analog.com
APPLICATIONS INFORMATION
Table 8. VOUTn_CFG Resistor Programming
RTOP (kΩ)
RBOT (kΩ)
VOUT (V)
0 or Open
Open
From EEPROM
10
23.2
5.0
10
15.8
3.3
16.2
20.5
2.5
16.2
17.4
1.8
20
17.8
1.5
20
15
1.35
20
12.7
1.25
20
11
1.2
24.9
11.3
1.15
24.9
9.09
1.1
24.9
7.32
1.05
24.9
5.76
0.9
24.9
4.32
0.75
30.1
3.57
0.65
30.1
1.96
0.6
Open
0
Output OFF*
(VOUT from EEPROM)
*OPERATION value and RUNn pin must both command the channel to
start from this configuration.
OutputvoltagecanbesetasshowninTable8.Forexample,
setting RTOP to 16.2kΩ and RBOT to 17.4kΩ is equivalent
to programming a VOUT_COMMAND value of 1.8V. Refer
to the Operations section for related parameters that are
also automatically set as a percentage of the programmed
VOUT if resistor configuration pins are used to determined
output voltage.
Table 9. FREQ_CFG Resistor Programming
RTOP (kΩ)
RBOT (kΩ)
SWITCHING
FREQUENCY (kHz)
0 or Open
Open
from EEPROM
20
17.8
1250
20
15
1000
20
12.7
900
20
11
750
24.9
11.3
600
24.9
9.09
500
24.9
7.32
450
24.9
5.76
400
24.9
4.32
350
30.1
3.57
300
30.1
1.96
250
Open
0
External SYNC Only
Note that if SYNC pins are shared between LTC3882-1s,
only one SYNC output should be enabled. All other SYNC
outputs should be disabled. For example, if configuring
two LTC3882-1s as a 4-phase rail operating at a frequency
of 600kHz, both devices should have RTOP of 24.9kΩ and
RBOT of 11.3kΩ on the FREQ_CFG pin. In this case, select-
ing RTOP of 24.9kΩ and RBOT of 9.09kΩ for PHAS_CFG on
thefirstIC(clockmaster)affords180°ofphaseseparation
and enables the SYNC output. The second device should
have RTOP of 20kΩ and RBOT of 12.7kΩ on PHAS_CFG,
to disable its SYNC output and run its phases with 180°
of separation in quadrature with the first IC. Only mix
phase selections that have the same maximum duty cycle
specified. Refer to Table 9 and 10.
Table 10. PHAS_CFG Resistor Programming
RTOP (kΩ)
RBOT (kΩ)
θSYNC TO θ0
θSYNC TO θ1
MAXIMUM DUTY CYCLE
SYNC OUTPUT DISABLED
0 or Open
Open
From EEPROM
From EEPROM
See MFR_PWM_CONFIG
From EEPROM
20
15
135°
315°
87.5%
Yes
20
12.7
90°
270°
20
11
45°
225°
24.9
11.3
0°
180°
24.9
9.09
0°
180°
No
24.9
7.32
120°
300°
83.3%
Yes
24.9
5.76
60°
240°
24.9
4.32
0°
180°
30.1
3.57
0°
120°
30.1
1.96
0°
180°
No
Open
0
0°
120°



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