LTC4449 datasheet(69/108 Pages) LINER

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LTC3882-1

Rev A

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PMBus COMMAND DETAILS

PAGE

The PAGE command provides the ability to configure, control and monitor both PWM channels through only one

physical address, either the MFR_ADDRESS or GLOBAL device address. Each PAGE contains the operating memory

for one PWM channel.

Pages 0x00 and 0x01 correspond to Channel 0 and Channel 1, respectively, in this device.

Setting PAGE to 0xFF applies any following paged commands to both outputs. With PAGE set to 0xFF the LTC3882-1

will respond to read commands as if PAGE were set to 0x00 (Channel 0 results).

This command has one data byte.

PAGE_PLUS_WRITE

The PAGE_PLUS_WRITE command provides a way to set the page within a device, send a command and then send

the data for the command, all in one communication packet. Commands allowed by the present write protection level

may be sent with PAGE_PLUS_WRITE.

The value stored in the PAGE command is not affected by PAGE_PLUS_WRITE. If PAGE_PLUS_WRITE is used to send

a non-paged command, the Page Number byte is ignored.

This command uses Write Block protocol. An example of the PAGE_PLUS_WRITE command with PEC sending a com-

mand that has two data bytes is shown in Figure 49.

(by functional groups)

Figure 49. Example of PAGE_PLUS_WRITE

SLAVE

ADDRESS

PAGE_PLUS

COMMAND CODE

BLOCK COUNT

(= 4)

W A

PAGE

NUMBER

1 1

…

COMMAND

CODE

UPPER DATA

BYTE

A P

38821 F49

1 1

PEC BYTE

LOWER DATA

BYTE

ADDRESSING AND WRITE PROTECT

COMMAND NAME

CMD

CODE DESCRIPTION

TYPE

PAGED

DATA

FORMAT UNITS NVM

DEFAULT

VALUE

PAGE

0x00 Channel (page) presently selected for any

paged command.

R/W Byte

Reg

0x00

PAGE_PLUS_WRITE

0x05 Write a command directly to a specified page. W Block

PAGE_PLUS_READ

0x06 Read a command directly from a specified

page.

Block R/W

Process

WRITE_PROTECT

0x10 Protect the device against unintended PMBus

modifications.

R/W Byte

Reg

0x00

MFR_ADDRESS

0xE6 Specify right-justified 7-bit device address.

R/W Byte

Reg

0x4F

MFR_RAIL_ADDRESS

0xFA Specify unique right-justified 7-bit address

for channels comprising a PolyPhase output.

R/W Byte

Reg

0x80

Related commands: MFR_COMMON.

LTC4449 Datasheet(PDF) 69 Page - Linear Technology

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