LTC4449 datasheet(44/108 Pages) LINER

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LTC3882-1

Rev A

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APPLICATIONS INFORMATION

The power dissipation for the main and synchronous

MOSFETs at maximum output current are given by:

PMAIN =

VOUT

VIN

IMAX

(

)

2 (1+ δ)R

DS(ON) +

VIN

2 IMAX

RDR

(

) CMILLER

(

)•

VGG – VTH(IL)

VTH(IL)

⎡

⎣

⎢

⎤

⎦

⎥

fPWM

(

)

PSYNC =

VIN – VOUT

VIN

IMAX

(

)

2 (1+ δ)R

DS(ON)

where δ is the temperature dependency of RDS(ON), RDR

is the effective top driver resistance, VIN is the drain po-

tential and the change in drain potential in the particular

application. VGG is the applied gate voltage, VTH(IL) is

the typical gate threshold voltage specified in the power

MOSFET data sheet at the specified drain current, and

CMILLER is the capacitance calculated using the technique

previously described.

The term (1 + δ) is generally given for a MOSFET in the

form of a normalized RDS(ON) versus temperature curve.

Typical values for δ range from 0.005/°C to 0.01/°C de-

pending on the particular MOSFET used.

BothMOSFETshaveI2RlosseswhilethetopsideN-channel

losses also include transition losses, which are highest

at high input voltages. For VIN < 20V the high current ef-

ficiency generally improves with larger MOSFETs, while

for VIN > 20V the transition losses rapidly increase to

the point that the use of a higher RDS(ON) device with

lower CMILLER actually provides higher efficiency. The

synchronous MOSFET losses are greatest at high input

voltage when the top switch duty factor is low or during

a short-circuit when the synchronous switch is on close

to 100% of the period.

Multiple MOSFETs can be used in parallel to lower RDS(ON)

and meet the current and thermal requirements if desired.

If using discrete drivers and MOSFETs, check the stress

on the MOSFETs by independently measuring the drain-

to-source voltages directly across the device terminals.

Bewareofinductiveringingthatcouldexceedthemaximum

voltage rating of the MOSFET. If this ringing cannot be

avoided and exceeds the maximum rating of the device,

choose a higher voltage rated MOSFET.

MOSFET Driver Selection

Gate driver ICs, DrMOS devices and power blocks with an

interface compatible with the LTC3882-1 3.3V three-state

PWM control output(s) can be used. An external resistor

divider may be needed to set three-state control voltage

outputs to mid-rail while in the high impedance state, de-

pendingonthedriverselected.Theseexternaldriver/power

circuits do not typically present a heavy capacitive load to

the LTC3882-1 PWM outputs. Suitable drivers such as the

LTC4449 are capable of driving large gate capacitances at

high transition rates. In fact, when driving MOSFETs with

very low gate charge, it is sometimes helpful to slow down

the drivers by adding small gate resistors (5Ω or less) to

reduce noise and EMI caused by fast transitions.

Using PWM Protocols

For successful utilization of the driver selected, the

appropriate LT3882-1 PWM control protocol must be

programmed. The LTC3882-1 supports two three-state

PWM control protocols. See bit 1, of the MFR_PWM_

MODE_LTC3882-1 PMBus command.

Thefirstoftheseprotocols(bit1=0)isfordriverscontrolled

by a single 3-state input that have sufficiently short delay

to the diode emulation state (both top and bottom power

MOSFETs disabled in a fraction of a PWM cycle), such

as the LTC4449. The second protocol (bit 1=1) handles

all other 3.3V compatible drivers with a single 3-state

control input.

CIN Selection

The input bypass capacitance for an LTC3882-1 circuit

needs to have ESR low enough to keep the supply drop

low as the top MOSFETs turn on, RMS current capability

adequate to withstand the ripple current at the input, and

a capacitance value large enough to maintain the input

voltage until the input supply can make up the difference.

Generally, a capacitor that meets the first two require-

ments (particularly a non-ceramic type) will have far more

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