LTC4449 datasheet(23/108 Pages) LINER

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LTC3882-1

Rev A

For more information www.analog.com

OPERATION

of the LTC3882-1 monitor ADC, they have an input range

of approximately ±128mV and a noise floor of 7μVRMS.

Peak-peaknoiseisapproximately46.5μV.TheinternalADC

anti-aliasing filter and conversion rate produce an average

readingoftheISENSEdifferentialvoltage.Theresultingvalue

is returned by the READ_IOUT PMBus command. Refer to

the Applications Information section for details on sensing

output current using inductor DCR or discrete resistors.

External and Internal Temperature Sense

Externaltemperaturecanbestbemeasuredusingaremote,

diode-connected PNP transistor such as the MMBT3906.

The emitter should be connected to a TSNS pin while the

base and collector terminals of the PNP transistor must be

shorted together and returned directly to the LTC3882-1

GND pin. Two different currents are applied to the diode

(nominally 2μA and 32μA) and the temperature is calcu-

lated from a ∆VBE measurement made with the internal

16-bit monitor ADC.

The LTC3882-1 also supports direct VBE based external

temperature measurements. In this case the diode or di-

ode network is trimmed to a specific voltage at a specific

current and temperature. In general this method does not

yield as accurate a result as the ∆VBE measurement. Refer

toMFR_PWM_MODE_LTC3882-1inthePMBusCommand

Detailssectionforadditionalinformationonprogramming

the LTC3882-1 for these two external temperature sense

configurations.

The calculated temperature is returned by the PMBus

READ_TEMPERATURE_1 command. Refer to the Appli-

cations Information section for details on proper layout

of external temperature sense elements and PMBus

commands that can be used to improve the accuracy of

calculated temperatures.

The READ_TEMPERATURE_2 command returns the

internal junction temperature of the LTC3882-1 using an

on-chip diode with a ∆VBE measurement and calculation.

Resistor Configuration Pins

Sixinputpinscanbeusedtoconfigurekeyoperatingparam-

eters with selected 1% resistors arranged between VDD25

and GND as a divider to the pin(s). The pins are ASEL0,

ASEL1,VOUT0_CFG,VOUT1_CFG,FREQ_CFG,andPHAS_CFG.

If any of these pins are left open the value stored in the

corresponding EEPROM command is used. The resistor

configuration pins are only measured during power-up

and execution of RESTORE_USER_ALL or MFR_RESET

commands. If bit 6 of the MFR_CONFIG_ALL_LTC3882-1

command is set in EEPROM, all resistor inputs except

ASELn are ignored. Per the PMBus specification, all pin-

programmed parameters can be overridden at any time

by commands from the digital interface.

The ASELn pin settings are described in application

Table 11. These pins can be used to select the entire

LTC3882-1 device address. ASEL0 always programs the

bottom four bits of the device address for the LTC3882-1

unless left open. ASEL1 can be used to program the three

most-significantbits.Eitherportionoftheaddresscanalso

be retrieved from the MFR_ADDRESS value in EEPROM.

If both pins are left open, the full 7-bit MFR_ADDRESS

value stored in EEPROM is used to determine the device

address. The LTC3882-1 always responds to 7-bit global

addresses 0x5A and 0x5B. MFR_ADDRESS should not be

set to either of these values.

The VOUTn_CFG pin settings are described in application

Table 8. These pins select the output voltages for the

related channel.

The following parameters are also set as a percentage of

the programmed VOUT if resistor configuration pins are

used to determined output voltage:

• VOUT_OV_FAULT_LIMIT: +10%

• VOUT_OV_WARN_LIMIT: +7.5%

• VOUT_MAX: +7.5%

• VOUT_MARGIN_HIGH: +5%

• VOUT_MARGIN_LOW: –5%

• VOUT_UV_WARN_LIMIT: –6.5%

• VOUT_UV_FAULT_LIMIT: –7%

The FREQ_CFG pin settings are described in application

Table 9. This pin selects the switching frequency of the

internal oscillator and enables the SYNC output if not left

open, shorted to GND or ignored by EEPROM setting.

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