LTC4449 datasheet(62/108 Pages) LINER

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LTC3882-1

Rev A

For more information www.analog.com

APPLICATIONS INFORMATION

The LTC3882-1 address is selected based on the program-

ming of the two configuration pins ASEL0 and ASEL1

according to Table 11. ASEL0 programs the bottom four

bits of the device address for the LTC3882-1, and ASEL1

programs the three most-significant bits. Either portion of

theaddresscanalsoberetrievedfromtheMFR_ADDRESS

value in EEPROM. If both pins are left open, the full 7-bit

MFR_ADDRESS value stored in EEPROM is used to deter-

mine the device address. In the 4-phase example above,

it is recommended that one or both ASELn pins on both

parts be programmed to create two unique addresses. The

LTC3882-1 also responds to 7-bit global addresses 0x5A

and 0x5B. MFR_ADDRESS and MFR_RAIL_ADDRESS

should not be set to either of these values.

Table 11. ASELn Resistor Programming

RTOP (kΩ) RBOT (kΩ)

ASEL1

ASEL0

LTC3882-1 DEVICE

ADDRESS BITS[6:4]

LTC3882-1 DEVICE

ADDRESS BITS[3:0]

BINARY

HEX

BINARY

HEX

0 or Open

Open

from EEPROM

23.2

1111

15.8

1110

16.2

20.5

1101

16.2

17.4

1100

17.8

1011

1010

12.7

1001

1000

24.9

11.3

111

0111

24.9

9.09

110

0110

24.9

7.32

101

0101

24.9

5.76

100

0100

24.9

4.32

011

0011

30.1

3.57

010

0010

30.1

1.96

001

0001

Open

000

0000

Internal Regulator Outputs

The VDD33 pin provides supply current for much of the

internal LTC3882-1 analog circuitry at a nominal value of

3.3V. The LTC3882-1 features an internal linear regulator

that can be used to supply 3.3V to VDD33 from a higher

voltage VCC supply (up to 12V nominal). Use of this LDO is

optional. The LTC3882-1 will also accept an external 3.3V

supply attached to this pin if VCC and VDD33 are shorted. If

the internal 3.3V LDO is used, it can supply a peak current

of 85mA (including internal consumption), and the VDD33

regulator output must be bypassed to GND with a low ESR

X5R or X7R ceramic capacitor with a value of 2.2μF. If an

external source supplies VDD33, a local low ESR bypass

capacitor with a value between 0.01μF and 0.1μF should

be placed directly between the VDD33 and GND pins.

Donotdrawmorethan20mAfromtheinternal3.3Vregula-

tor for the host system, governed by IC power dissipation

asdiscussedinthenextsection.Thislimitincludescurrent

required for external pull up resistors for the LTC3882-1

that are terminated to VDD33.

VDD33 powers a second internal 2.5V LDO whose output

is present on VDD25. This 2.5V supply provides power for

muchoftheinternalprocessorlogicontheLTC3882-1.The

VDD25 output should be bypassed directly to GND with a

low ESR X5R or X7R ceramic capacitor with a value of 1μF

or greater. Do not draw any external system current from

this supply beyond that required for LTC3882-1 specific

configuration resistor dividers.

IC Junction Temperature

The user must ensure that the maximum rated junction

temperatureisnotexceededunderalloperatingconditions.

The thermal resistance of the LTC3882-1 package (θJA)

is 33°C/W, provided the exposed pad is in good thermal

contact with the PCB. The actual thermal resistance in the

applicationwilldependonforcedaircoolingandotherheat

sinking means, especially the amount of copper on the

PCB to which the LTC3882-1 is attached. The following

formula may be used to estimate the maximum average

power dissipation PD (in watts) of the LTC3882-1 when

VCC is supplied externally.

PD = VCC(0.024 + fPWM • 1.6e-5 + IEXT + IRC25)

where:

IEXT = total external load drawn from VDD33, including

local pull-up resistors, in amps

IRC25 = total current drawn from VDD25 by LTC3882-1

configuration resistor dividers, in amps

and the PWM frequency fPWM is given in kHz

LTC4449 Datasheet(PDF) 62 Page - Linear Technology

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