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LTC4449 Datasheet(PDF) 8 Page - Linear Technology |
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LTC4449 Datasheet(HTML) 8 Page - Linear Technology |
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8 / 108 page ![]() LTC3882-1 8 Rev A For more information www.analog.com ELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3882-1 is tested under pulsed load conditions such that TJ ≈ TA. The LTC3882-1E is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3882-1I is guaranteed over the full –40°C to 125°C operating junction temperature range. Junction temperature TJ is calculated in °C from the ambient temperature TA and power dissipation PD according to the formula: TJ = TA + (PD • θJA) where θJA is the package thermal impedance. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. Refer to the Applications Information section. Note 3: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. The maximum rated junction temperature will be exceeded when this protection is active. Continuous operation above the specified absolute maximum operating junction temperature may impair device reliability or permanently damage the device. Note 4: EEPROM endurance, retention and mass write times are guaranteed by design, characterization and correlation with statistical process controls. Minimum retention applies only for devices cycled less than the minimum endurance specification. EEPROM read commands (e.g. RESTORE_USER_ALL) are valid over the entire specified operating junction temperature range. Note 5: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to GND unless otherwise specified. Note 6: Minimum EEPROM endurance, retention and mass write time specifications apply when writing data with 3.15V ≤ VDD33 ≤ 3.45V. EEPROM read commands are valid over the entire specified VDD33 operating range. Note 7: Specified VOUT error with AVP = 0% requires servo mode to be set with MFR_PWM_MODE_LTC3882-1 command bit 6. Performance is guaranteed by testing the LTC3882-1 in a feedback loop that servos VOUT to a specified value. Note 8: ADC tested with PWMs disabled. Comparable capability demonstrated by in-circuit evaluations. Total Unadjusted Error includes all gain and linearity errors, as well as offsets. Note 9: Internal 32-bit calculations using 16-bit ADC results are limited to 10-bit resolution by PMBus Linear 11-bit data format. Note 10: Limits guaranteed by TSNS voltage and current measurements during test, including ADC readback. Note 11: Data conversion is done in round robin fashion. All inputs signals are continuously scanned in sequence resulting in a typical conversion latency of 90ms. Note 12: Guaranteed by design. Note 13: Do not apply a voltage or current source directly to these pins. They should only be connected to passive RC loads, otherwise permanent damage may occur. Note 14: Do not apply a voltage source to this pin unless shorted to VCC. See Electrical Characteristics for applicable limits beyond which permanent damage may occur. |
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