LTC4449 datasheet(17/108 Pages) LINER

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LTC3882-1

Rev A

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OPERATION

• Operating Condition Telemetry

• PhaseLockedLoopforSynchronousPolyPhaseOpera-

tion (2, 3, 4, 6, or 8 phases)

• Fully Differential Load Sense

• Non-Volatile Configuration Memory with ECC

• Optional External Configuration Resistors for Key Op-

erating Parameters

• Optional Time-Base Interconnect for Synchronization

Between Multiple Controllers

• Fault Event Data Logging

• Capable of Standalone Operation with Default Factory

Configuration

• PMBus Revision 1.2 Compliant Interface up to 400kHz

The PMBus interface provides access to important power

management data during system operation including:

• Average Input Voltage

• Average Output Voltages

• Average Output Currents

• Average PWM Duty Cycles

• Internal LTC3882-1 Temperature

• External Sensed Temperatures

• Warning and Fault Status, Including Input and Output

Undervoltage and Overvoltage

The LTC3882-1 supports four serial bus addressing

schemestoaccesstheindividualPWMchannelsseparately

or jointly.

Fault communication, reporting and system response

behavior are fully configurable. Two fault I/Os are pro-

vided (FAULT0, FAULT1) that can be controlled indepen-

dently. A separate ALERT pin also provides for a maskable

SMBALERT#. Fault responses for each channel may be

individually programmed, depending on the fault type.

PMBus status commands allow fault reporting over the

serial bus to identify a specific fault event.

Main Control Loop

The LTC3882-1 utilizes constant frequency voltage mode

control with leading-edge modulation. This provides

improved response to a load step increase, especially at

larger VIN/VOUT ratios found in the low voltage, high cur-

rent solutions demanded by modern digital subsystems.

The LTC3882-1 leading-edge modulation architecture

does not have a minimum on-time requirement. Minimum

duty cycle will be determined by performance limits of

the external power stage. The IC is also capable of active

voltage positioning (AVP) to afford the smallest output

capacitors possible for a given output voltage accuracy

over the anticipated full load range. The LTC3882-1 error

amplifiers have high bandwidth, low offset and low out-

put impedance, allowing the control loop compensation

network to be optimized for very high crossover frequen-

cies and excellent transient response. The controller also

achieves outstanding line transient response by using

inputfeedforwardcompensationtoinstantaneouslyadjust

PWM duty cycle and significantly reduce output under/

overshootduringsupplyvoltagechanges.Thisalsohasthe

added advantage of making the DC loop gain independent

of input voltage.

The main PWM control loop used for each channel is

illustrated in Figure 1. During normal operation the top

MOSFET (power switch) driving choke L1 is commanded

off when the clock for that channel resets the RS latch.

The power switch is commanded back on when the main

PWM comparator VC, sets the RS latch. The error ampli-

fier EA output (COMP) controls the PWM duty cycle to

match the FB voltage to the EA positive terminal voltage

in steady state. A patented circuit adjusts this output for

VINSNS line feedforward.

The positive terminal of the EA is connected to the output

of a 12-bit DAC with values ranging from 0V to 1.024V. The

DAC value is determined by the resistor configuration pins

detailedinapplicationTable8,byvaluesretrievedfrominter-

nal EEPROM, or by a combination of PMBus commands to

synthesizethedesiredoutputvoltage.Refertothefollowing

PMBusCommandDetailssectionofthisdocumentformore

information. The LTC3882-1 supports two output ranges.

EA can regulate the output voltage to 5.5x the DAC output

(Range 0) or 2.75x the DAC output (Range 1).

LTC4449 Datasheet(PDF) 17 Page - Linear Technology

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