LTM4677 datasheet(20/116 Pages) AD

20 / 116 page

LTC3883/LTC3883-1

Rev. F

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OPERATION

amount of time following either the RUN pin going high, a

PMBus command to turn on, or the VIN pin voltage rising

aboveapreprogrammedvoltage.Offsequencingishandled

in a similar way. To assure proper sequencing, make sure

allICsconnecttheSHARE_CLKpinstogetherandRUNpins

together. If the RUN pins can not be connected together for

some reason, set bit 2 of MFR_CHAN_CONFIG_LTC3883

to a 1. This bit requires the SHARE_CLK pin to be clocking

beforethepowersupplyoutputcanstart.WhentheRUNpin

ispulledlow,theLTC3883willholdthepinlowfortheMFR_

RESTART_DELAY.TheminimumMFR_RESTART_DELAY

isTOFF_DELAY+TOFF_FALL+136ms.Thisdelayassures

proper sequencing of all rails. The LTC3883 calculates

this delay internally and will not process a shorter delay.

However, a longer commanded MFR_RESTART_DELAY

will be used by the part. The maximum allowed value is

65.52 seconds.

VOLTAGE-BASED SEQUENCING

The GPIO pin can be asserted when the UV threshold is

exceeded. It is possible to feed the GPIO pin from one

LTC3883 into the RUN pin of the next LTC3883 in the

sequence. To use the GPIO pin for voltage based sequenc-

ing, set bit 12 of the MFR_GPIO_PROPAGATE_LTC3883

command = 1. Bit 12 is the VOUT_UVUF which is the

deglitched VOUT_UV comparator. Using the deglitched

VOUT_UV fault limit is recommended because there is

little appreciable time delay between the comparator

crossing the UV threshold and the GPIO pin releasing

This can be implemented across multiple LTC3883s.

The VOUT_UVUF has a 70µs minimum pulse width filter.

If the GPIO_FAULT_RESPONSE command is not set to

ignore, the part will latch off and never be able to start.

If the VOUT voltage bounces around the UV threshold for

a long period of time it is possible for the GPIO output

to toggle more than once. To minimize this problem, set

the TON_RISE time under 100ms. If a fault in the string

of rails is detected, only the faulted rail and downstream

rails will fault off. The rails in the string of devices in front

of the faulted rail will remain on unless commanded off.

SHUTDOWN

The LTC3883 supports two shutdown modes. The first

mode is closed-loop shutdown response, with user-

defined turn-off delay (TOFF_DELAY) and ramp down

rate (TOFF_FALL). The controller will maintain the mode

of operation for TOFF_FALL. In discontinuous conduction

mode, the controller will not draw current from the load

and the fall time will be set by the output capacitance and

load current.

The other shutdown mode occurs in response to a fault

condition or loss of SHARE_CLK (if bit 2 of MFR_CHAN_

CONFIG_LTC3883 is set to a 1) or VIN falling below the

VIN_OFF threshold or GPIO pulled low externally (if the

MFR_GPIO_RESPONSE is set to inhibit). Under these

conditions the power stage is disabled in order to stop

the transfer of energy to the load as quickly as possible.

The shutdown state can be entered from the soft-start or

active regulation states either through user intervention

(deasserting RUN or the PMBus OPERATION command)

or in response to a detected fault or an external fault via

the bidirectional GPIO pin, or loss of SHARE_CLK (if bit

2 of MFR_CHAN_CONFIG_LTC3883 is set to a 1) or VIN

falling below the VIN_OFF threshold.

In hiccup mode, the controller responds to a fault by

shutting down and entering the inactive state for a

programmable delay time (MFR_RETRY_DELAY). This

delay minimizes the duty cycle associated with autono-

mous retries if the fault that caused the shutdown disap-

pears once the output is disabled. The retry delay time

is determined by the longer of the MFR_RETRY_DELAY

command or the time required for the regulated output

to decay below 12.5% of the programmed value. If

multiple outputs are controlled by the same GPIO pin,

Figure 2. Event (Voltage) Based Sequencing

LTC3883

Voltage Based Sequencing by Cascading GPIOs into RUN Pins

GPIO = VOUT_UVUF

RUN

START

LTC3883

3883 F02

RUN

GPIO = VOUT_UVUF

TO NEXT CHANNEL

IN THE SEQUENCE

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