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GC5316 Datasheet(PDF) 5 Page - Texas Instruments |
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GC5316 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 75 page ![]() GC5316 SLWS154A − JANUARY 2004 − REVISED MARCH 2004 www.ti.com 5 Next the signal is sent to an 8-stage FIFO. This allows an arbitrary phase relationship between adcclk and rxclk. The frequency relationship is fixed by the configuration. The FIFO can be bypassed, clocking the input data directly on rxclk. Note that if the FIFO is bypassed, the hold times are longer than usual. If the input rate is a fraction (1/2, 1/4, or 1/8) of rxclk then ssel_rxin determines which of the multiple rising clock edges are used to sample the data. Table 1. Programming VARIABLE DESCRIPTION rduz_sens_ena When enabled adds noise to the ADC input using nz_pwr_mask. nz_pwr_mask Selects the noise bits to be added to the ADC input sample when rduz_sens_ena is one. adc_fifo_bypass When asserted bypasses the input FIFO. Data is latched directly using the rxclk input when FIFO is bypassed. Should set this to 0 when input data is to be latched using the adcclk input. Most applications should not bypass the fifo. 2.1.2 Resampler Block Two of the four 16-bit data input ports, rxin_a, and rxin_c have resampler blocks. The data is clocked from an external clock signal adcclk. The real input signal is downconverted by adcclk/4 and is then low-pass filtered and decimated. Decimation can be either by 1.5 or by 2. Both these decimation modes support up to 24 CDMA DDC channels, or 12 UMTS DDC channels. 2 Resam p ler D ecim ate by 1.5 3 LPF 24 tap adcclk 4 adcclk rxclk 3 4 = 18 18 bus b (or d) bus a (or c) I Q at rxclk/2 I Q 16 rxin_a (or c) at adcclk rx_distribution Figure 3. Resampler Decimate by 1.5 Mode The decimate by 1.5 mode requires the input data rate to be 3/4 of the receive clock rate (adcclk frequency is 3/4 rxclk frequency). A 24-tap low-pass decimation filter with programmable 18-bit coefficients removes alias images that would fold into the passband prior to decimation. The following table shows the performance of filters designed for various bandwidths when the resampler is decimating by 1.5. The table also shows the resulting passband frequencies assuming the input data rate is 92.16 MSPS. Each horizontal row is a unique 24-tap filter which is available on the web. Table 2. Resampler Filter Performance in the Decimate by 1.5 Mode GENERAL APPLICATION EXAMPLE APPLICATION adclk: 92.16 MHz PASSBAND RIPPLE STOPBAND BANDWIDTH F LOWER F CENTER F UPPER of clk dB dB MHz MHz MHz MHz 0.05 0 −101.5 18.4 13.8 23 32.3 0.06 0 −98 22.1 12 23 34.1 0.07 0 −91.7 25.8 10.1 23 35.9 0.08 0.01 −84.1 29.5 8.3 23 37.8 0.09 0.03 −75.6 33.2 6.5 23 39.6 0.1 0.07 −67.1 36.9 4.6 23 41.5 0.11 0.18 −59.5 40.6 2.8 23 43.3 0.05 0 −101.5 18.4 13.8 23 32.3 0.06 0 −98 22.1 12 23 34.1 |
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