GC5316 datasheet(22/75 Pages) TI

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GC5316

SLWS154A − JANUARY 2004 − REVISED MARCH 2004

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Table 19. Programming

VARIABLE

DESCRIPTION

agc_dbelow(3:0)

Sets the value of gain step size Dblw (data

× current gain below threshold). Dblw = 3 + agc_dbelow.

agc_dbelow ranges from 0 to 15.

agc_dabove(3:0)

Sets the value of gain step size Dabv (data

× current gain above threshold). Dabv = 3 + agc_ dabove. agc_ dabove

ranges from 0 to 15.

agc_dzero(3:0)

Sets the value of gain step size Dzro (data

× current gain consistently zero). Dzro = 3 + agc_ dzero. agc_ dzero

ranges from 0 to 15.

agc_dsat(3:0)

Sets the value of gain step size Dsat (data

× current gain consistently saturated). Dsat = 3 + agc_ dsat. agc_ dsat

ranges from 0 to 15.

agc_zero_msk(3:0)

Masks the lower 4 bits of signal data so as to be considered zeros.

agc_thres(7:0)

AGC threshold. Compared with magnitude of 8 bits of input

× gain.

agc_gaina_lsb(15:0)

Lower 16 bits of 19-bit gain word for DDC A. Requires a sync (ssel_gain) to load.

agc_gaina_msb(18:16)

Upper 3 bits of 19-bit gain word for DDC A. Requires a sync (ssel_gain) to load.

agc_gainb_lsb(15:0)

Lower 16 bits of 19-bit gain word for DDC B (in CDMA mode). Requires a sync (ssel_gain) to load.

agc_gainb_msb(18:16)

Upper 3 bits of 19-bit gain word for DDC B (in CDMA mode). Requires a sync (ssel_gain) to load.

ssel_gain(2:0)

Sync to update agc_gain settings. Note that both A and B are updated.

agc_zero_cnt

When the AGC output (input

× gain) masked magnitude is zero value this number of times, the shift value is

changed to agc_dzero.

agc_max_cnt

When the AGC output (input

× gain) is zero value this number of times, the shift value is changed to agc_dsat.

agc_md(3:0)

AGC rounding. Number of output bits = 18 – agc_rnd.

agc_rnd_disable

AGC rounding is disabled when this bit is set.

agc_freeze

Freezes the adaptive portion of the gain to current value.

agc_clear

Clears the adaptive portion of the gain.

agc_amax(15:0)

The maximum value that gain can be adjusted up to. Top 7 bits are integer, bottom 9 bits are fractional.

agc_amin(15:0)

The minimum value that gain can be adjusted down to. Top 7 bits are integer, bottom 9 bits are fractional.

gain_mon

When set, combines current AGC gain with I and Q data. The 18-bit output format thus becomes:

I Portion: 8 bits of AGC’d I data − Gain(18:11) − 00

Q Portion: 8 bits of AGC’d Q data − Gain(10:5) − Status(1:0) − 00.

Note: Bit 0 of status, when set, indicates the data is saturated. Bit 1 of status, when set, indicates the data is zero.

GC5316 Datasheet(PDF) 22 Page - Texas Instruments

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