GC5316 datasheet(29/75 Pages) TI

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GC5316

SLWS154A − JANUARY 2004 − REVISED MARCH 2004

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Table 2. Programming

VARIABLE

DESCRIPTION

serp_tran_bits(4:0)

Number of serial input bits in a word – 1. i.e., 10001 = 18 bits

serp_tran_fsinvl(6:0)

Frame sync interval in bits

serp_tran_fsdel(1:0)

The number of serial bits after frame strobe that the data MSB is expected.

serp_tran_4pin

0= 2 pin input mode. Applies to UMTS mode for separate I and q data bits, as well as CDMA mode where

one pin is for interleaved I/Q data for the CDMA A channel and another pin for interleaved I/Q data for the

CDMA B channel.

1= 4 pin mode. Applies to UMTS mode where the channel has two bits for I data (Imsb and Imsb−1) and two

bits for Q data (Qmsb and Qmsb−1)

serp_tran_clkdiv(3:0)

Serial input data bit clock divider factor − 1

ssel_serial(2:0)

Sync source

The parameters are set for a pair of DUC blocks; i.e., for 2k and 2k+1 DUCs, where k= 0 to 5.

3.1.2 Transmit Gain

Figure 24. Transmit Gain Block

The transmit gain block is a multiplier that increases or decreases the level of the input data. The unsigned 16-bit

gain word is interpreted with the binary point three bits down from the MSB. It multiplies the input data by (gain

word/8192). The maximum gain is therefore 65535/8192. There are different gain registers for the A and B signals

in CDMA mode.

A transfer register in combination with a sync (ssel_gain) is used to synchronize gain changes across multiple

channels.

Table 3. Programming

VARIABLE

DESCRIPTION

gainfora(15:0)

Gain for the A-side DUC. Interpreted as gainfora/8192 and is unsigned.

gainforb(15:0)

Gain for the B-side DUC. Interpreted as gainforb/8192 and is unsigned.

ssel_gain(2:0)

Sync source

GC5316 Datasheet(PDF) 29 Page - Texas Instruments