TPS62933O datasheet(28/47 Pages) TI

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ceramic capacitor has DC bias de-rating, it can be achieved with a bank of 2 × 22-μF, 35-V, ceramic capacitor

C3216X5R1V226M160AC in the 1206 case size.

More output capacitors can be used to improve the load transient response. Ceramic capacitors can easily meet

the minimum ESR requirements. In some cases, an aluminum electrolytic capacitor can be placed in parallel

with the ceramics to build up the required value of capacitance. When using a mixture of aluminum and ceramic

capacitors, use the minimum recommended value of ceramics and add aluminum electrolytic capacitors as

needed.

The recommendations given in Table 9-2 provide typical and minimum values of output capacitance for the

given conditions. These values are the effective figures. If the minimum values are to be used, the design must

be tested over all of the expected application conditions, including input voltage, output current, and ambient

temperature. This testing must include both bode plot and load transient assessments. The maximum value of

total output capacitance can be referred to the application note (COUT selection and CFF selection) in Technical

documentation. Large values of output capacitance can adversely affect the start-up behavior of the converter as

well as the loop stability. If values larger than noted here must be used, then a careful study of start-up at full

load and loop stability must be performed.

In practice, the output capacitor has the most influence on the transient response and loop phase margin. Load

transient testing and bode plots are the best way to validate any given design and must always be completed

before the application goes into production. In addition to the required output capacitance, a small ceramic

placed on the output can reduce high frequency noise. Small case size ceramic capacitors in the range of 1 nF

to 100 nF can help reduce spikes on the output caused by inductor and board parasitics.

Table 9-2 shows the recommended LC combination.

Table 9-2. Recommended LC Combination

VOUT(V)

fSW (kHz) RTOP(kΩ) RDOWN(kΩ) TYPICAL INDUCTOR L (μH)

TYPICAL EFFECTIVE COUT

(μF)

MINIMUM EFFECTIVE

COUT (μF)

3.3

500

31.3

10.0

4.7

1200

2.2

500

52.5

10.0

6.8

1200

3.3

500

140.0

10.0

9.2.2.9 Input Capacitor Selection

The TPS62933 device requires an input decoupling capacitor and, depending on the application, a bulk input

capacitor. The typical recommended value for the decoupling capacitor is 10 μF, and an additional 0.1-µF

capacitor from the VIN pin to ground is recommended to provide high frequency filtering.

The value of a ceramic capacitor varies significantly over temperature and the amount of DC bias applied to the

capacitor. X5R and X7R ceramic dielectrics are recommended because they have a high capacitance-to-volume

ratio and are fairly stable over temperature. The capacitor must also be selected with the DC bias taken into

account. The effective capacitance value decreases as the DC bias increases.

The capacitor voltage rating needs to be greater than the maximum input voltage. The capacitor must also have

a ripple current rating greater than the maximum input current ripple of the TPS62933. The input ripple current

can be calculated using Equation 22.

IN_MIN

OUT

CIN _ RMS

OUT

IN_MIN

(22)

For this example design, two TDK CGA5L1X7R1H106K160AC (10-μF, 50-V, 1206, X7R) capacitors have been

selected. The effective capacitance under input voltage of 24 V for each one is 3.45 μF. The input capacitance

value determines the input ripple voltage of the converter. The input voltage ripple can be calculated using

TPS62933

SLUSEA4A – JUNE 2021 – REVISED DECEMBER 2021

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