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TPS62933O Datasheet(PDF) 27 Page - Texas Instruments |
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TPS62933O Datasheet(HTML) 27 Page - Texas Instruments |
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27 / 47 page ![]() • K = 0.4 • VIN_MAX = 30 V • fSW = 500 kHz • IOUT_MAX = 3 A The inductor value is calculated to be 6.94 μH. Choose the nearest standard value of 6.8 μH. This gives a new K value of 0.408. The max IHS_LIMIT is 5.8 A, the calculated peak current is 3.61 A, and the calculated RMS current is 3.02 A. The chosen inductor is a Würth Elektronik, 74439346068, 6.8 μH, which has a saturation current rating of 10 A and a RMS current rating of 6.5 A. The maximum inductance is limited by the minimum current ripple required for the peak current mode control to perform correctly. To avoid subharmonic oscillation, as a rule-of-thumb, the minimum inductor ripple current should be no less than about 10% of the device maximum rated current (3 A) under nominal conditions. 9.2.2.8 Output Capacitor Selection The device is designed to be used with a wide variety of LC filters. It is generally desired to use as little output capacitance as possible to keep cost and size down. The output capacitance, COUT, should be chosen with care since it directly affects the following specification: • Steady state output voltage ripple • Loop stability • Output voltage overshoot and undershoot during load current transient The output voltage ripple is essentially composed of two parts. One is caused by the inductor current ripple going through the Equivalent Series Resistance (ESR) of the output capacitors: ¿VOUT _ESR = ¿IL × ESR = K × IOUT × ESR (19) The other is caused by the inductor current ripple charging and discharging the output capacitors: ¿VOUT _C = ¿IL 8 × fSW × COUT = K × IOUT 8 × fSW × COUT (20) K is the ripple ratio of the inductor current (ΔIL / IOUT_MAX). The two components in the voltage ripple are not in phase, so the actual peak-to-peak ripple is smaller than the sum of the two peaks. Output capacitance is usually limited by the load transient requirements rather than the output voltage ripple if the system requires tight voltage regulation with presence of large current steps and fast slew rate. When a large load step happens, output capacitors provide the required charge before the inductor current can slew up to the appropriate level. The control loop of the converter usually needs eight or more clock cycles to regulate the inductor current equal to the new load level. The output capacitance must be large enough to supply the current difference for about eight clock cycles to maintain the output voltage within the specified range. Equation 21 shows the minimum output capacitance needed for specified VOUT overshoot and undershoot. 2 1 1 2 12 ª º ' t u u « » u ' u « » ¬ ¼ OUT OUT SW OUT I K C ( D) ( K) ( D) f V K (21) where • D = VOUT / VIN, duty cycle of steady state • ΔVOUT = Output voltage change • ΔIOUT = Output current change For this design example, the target output ripple is 30 mV. Presuppose ΔVOUT_ESR = ΔVOUT_C = 30 mV and choose K = 0.4. Equation 19 yields ESR no larger than 25 mΩ and Equation 20 yields COUT no smaller than 10 μF. For the target overshoot and undershoot limitation of this design, ΔVOUT_SHOOT < 5% × VOUT = 250 mV for an output current step of ΔIOUT = 1.5 A. COUT is calculated to be no smaller than 25 μF by Equation 21. In summary, the most stringent criterion for the output capacitor is 25 μF. Considering the www.ti.com TPS62933 SLUSEA4A – JUNE 2021 – REVISED DECEMBER 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 27 Product Folder Links: TPS62933 |
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