TPS62933O datasheet(15/47 Pages) TI

15 / 47 page

the switching frequency is decreased by the control loop to maintain output voltage regulation when load current

reduces. Switching loss is further reduced in PFM operation due to less frequent switching actions. Since the

integrated current comparator catches the peak inductor current only, the average load current entering PFM

mode varies with the applications and external output LC filters.

In PFM mode, the high-side MOSFET is turned on in a burst of one or more pulses to provide energy to

the load. The duration of the burst depends on how long it takes the feedback voltage catches VREF. The

periodicity of these bursts is adjusted to regulate the output, while zero current crossing detection turns off the

low-side MOSFET to maximize efficiency. This mode provides high light-load efficiency by reducing the amount

of input supply current required to regulate the output voltage at small loads. This trades off very good light-load

efficiency for larger output voltage ripple and variable switching frequency.

8.3.3 Voltage Reference

The internal reference voltage VREF is designed at typical 0.8 V, the negative feedback system of converter

produces a precise ±2% feedback voltage VFB over full temperature by scaling the output of a temperature

stable internal bandgap circuit.

8.3.4 Output Voltage Setting

A precision 0.8-V reference voltage, VREF, is used to maintain a tightly regulated output voltage over the entire

operating temperature range. The output voltage is set by a resistor divider from the output voltage to the FB pin.

It is recommended to use 1% tolerance resistors with a low temperature coefficient for the FB divider. Select the

bottom-side resistor, RFBB, for the desired divider current and use Equation 1 to calculate the top-side resistor,

RFBT. Lower RFBB increases the divider current and reduces efficiency at very light load. Larger RFBB makes

the FB voltage more susceptible to noise, so the larger RFBB value requires more carefully designed feedback

path on the PCB. Setting RFBB = 10 kΩ and RFBT in the range of 10 kΩ to 300 kΩ is recommended for most

applications.

The tolerance and temperature variation of the resistor dividers affect the output voltage regulation.

OUT

FBT

FBB

Figure 8-2. Output Voltage Setting

OUT

REF

FBT

FBB

REF

- V

× R

(1)

where

• VREF = 0.8 V, the internal reference voltage

• RFBB = 10 kΩ is recommended

8.3.5 Switching Frequency Selection

The switching frequency is set by the condition of the RT input. The condition of this input is detected when the

device is first enabled. Once the converter is running, the switching frequency selection is fixed and cannot be

changed until the next power-on cycle or EN toggle. Table 8-1 shows the selection programming. In adjustable

frequency mode, the switching frequency can be set between 200 kHz and 2200 kHz by proper selection of RT

resistor. See Equation 2.

www.ti.com

TPS62933

SLUSEA4A – JUNE 2021 – REVISED DECEMBER 2021

Submit Document Feedback

Product Folder Links: TPS62933

TPS62933O Datasheet(PDF) 15 Page - Texas Instruments

TPS62933O Datasheet(HTML) 15 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47

Datasheet Download

Link URL