DP8500 datasheet(48/70 Pages) NSC

48 / 70 page

130 Absolute Maximum Ratings (Note 1)

If MilitaryAerospace specified devices are required

please contact the National Semiconductor Sales

OfficeDistributors for availability and specifications

Temperature under Bias

0 Cto a70 C

Storage Temperature

65 Cto a150 C

All Input or Output Voltage

with Respect to GND

05V to a7V

Power Dissipation

20 MHz

05W

140 DC Electrical Characteristics TA e 0 Cto a70 C VCC e 5V g10% GND e 0V

Symbol

Parameter

Conditions

Min

Typ

Max

Units

VIH

Logical 1 Input Voltage

Tested with a Limited

VCC a 05

Functional Pattern

VIL

Logical 0 Input Voltage

Tested with a Limited

Functional Pattern

VOH1

Q and WE Outputs

IOH eb10 mA

VCC b 10

VOL1

Q and WE Outputs

IOL e 10 mA

VOH2

All Outputs except Qs WE

IOH eb3mA

VCC b 10

VOL2

All Outputs except Qs WE

IOL e 3 mA

IIN

Input Leakage Current

VIN e VCC or GND

IIL ML

ML Input Current (Low)

VIN e GND

200

ICC1

Standby Current

CLK at 8 MHz (VIN e VCC or GND)

ICC1

Standby Current

CLK at 20 MHz (VIN e VCC or GND)

ICC1

Standby Current

CLK at 25 MHz (VIN e VCC or GND)

ICC2

Supply Current

CLK at 8 MHz (Inputs Active)

(ILOAD e 0) (VIN e VCC or GND)

ICC2

Supply Current

CLK at 20 MHz (Inputs Active)

(ILOAD e 0) (VIN e VCC or GND)

ICC2

Supply Current

CLK at 25 MHz (Inputs Active)

(ILOAD e 0) (VIN e VCC or GND)

CIN

Input Capacitance

fIN at 1 MHz

Note CIN is not 100% tested

150 AC Timing Parameters DP8520ADP8521ADP8522A

The AC timing parameters are grouped into sectional num-

bers as shown below These numbers also refer to the tim-

ing diagrams

1 – 38

Common parameters to all modes of operation

50 – 56

Difference parameters used to calculate

RAS low time

RAS precharge time

CAS high time and

CAS low time

100 – 121 Common dual access parameters used for Port

B accesses and inputs and outputs used only in

dual accessing

200 – 212 Refresh parameters

300 – 315 Mode 0 access parameters used in both single

and dual access applications

400 – 416 Mode 1 access parameters used in both single

and dual access applications

450 – 455 Special Mode 1 access parameters which super-

sede the 400 – 416 parameters when dual ac-

cessing

500 – 506 Programming parameters

600 – 605 Graphics parameters for VRAM transfer cycles

Unless otherwise stated VCC e 50V g10% 0 k TA k

70 C the output load capacitance is typical for 4 banks of

18 VRAMs per bank including trace capacitance (see Note

Two different loads are specified

CL e 50 pF loads on all outputs except

CL e 150 pF loads on Q0–8 9 and 10 or

CH e 50 pF loads on all outputs except

CH e 125 pF loads on RAS0–3 and CAS0–3 and

CH e 380 pF loads on Q0–8 9 and 10

DP8500 Datasheet(PDF) 48 Page - National Semiconductor (TI)

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