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DP8500 Datasheet(PDF) 49 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # DP8500
Description  DP8520A/DP8521A/DP8522A microCMOS Programmable 256k/1M/4M Video RAM Controller/Drivers
PDF  70 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP8500 Datasheet(HTML) 49 Page - National Semiconductor (TI)

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150 AC Timing Parameters DP8520ADP8521ADP8522A (Continued)
Common Parameter
8520A21A22A-25
Number
Symbol
Description
CL
CH
Min
Max
Min
Max
1
fCLK
CLK Frequency
0
25
0
25
2
tCLKP
CLK Period
40
40
3 4
tCLKPW
CLK Pulse Width
12
12
5
fDCLK
DELCLK Frequency
5
20
5
20
6
tDCLKP
DELCLK Period
50
200
50
200
7 8
tDCLKPW
DELCLK Pulse Width
12
12
9a
tPRASCAS0
RAS Asserted to CAS Asserted
30
30
(tRAH e 15 ns tASC e 0 ns)
9b
tPRASCAS1
RAS Asserted to CAS Asserted
40
40
(tRAH e 15 ns tASC e 10 ns)
9c
tPRASCAS2
(RAS Asserted to CAS Asserted
40
40
(tRAH e 25 ns tASC e 0 ns)
9d
tPRASCAS3
(RAS Asserted to CAS Asserted
50
50
(tRAH e 25 ns tASC e 10 ns)
10a
tRAH
Row Address Hold Time (tRAH e 15)
15
15
10b
tRAH
Row Address Hold Time (tRAH e 25)
25
25
11a
tASC
Column Address Setup Time (tASC e 0)
0
0
11b
tASC
Column Address Setup Time (tASC e 10)
10
10
12
tPCKRAS
CLK High to RAS Asserted
22
26
following Precharge
13
tPARQRAS
AREQ Negated to RAS Negated
31
35
14
tPENCL
ECAS0 – 1 Asserted to CAS Asserted
20
27
15
tPENCH
ECAS0 – 1 Negated to CAS Negated
20
27
16
tPARQCAS
AREQ Negated to CAS Negated
47
54
17
tPCLKWH
CLK to WAIT Negated
31
31
18
tPCLKDL0
CLK to DTACK Asserted
(Programmed as DTACK of 12 1 1
28
28
or if WAITIN is Asserted)
19
tPEWL
ECAS Negated to WAIT Asserted
36
36
during a Burst Access
20
tSECK
ECAS Asserted Setup to CLK High to
Recognize the Rising Edge of CLK
19
19
during a Burst Access
49



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