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CS47L35 Datasheet(PDF) 43 Page - Cirrus Logic |
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CS47L35 Datasheet(HTML) 43 Page - Cirrus Logic |
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43 / 300 page ![]() DS1085F3 43 CS47L35 4.3 Digital Core 4.3.2 Digital-Core Inputs The digital core comprises multiple input paths, as shown in Fig. 4-12. Any of these inputs may be selected as a source to the digital mixers or signal-processing functions within the CS47L35 digital core. Note that the outputs from other blocks within the digital core may also be selected as input to the digital mixers or signal-processing functions within the CS47L35 digital core. Those input sources, which are not shown in Fig. 4-12, are described separately throughout Section 4.3. The hexadecimal numbers in Fig. 4-12 indicate the corresponding x_SRCn setting for selection of that signal as an input to another digital-core function. The sample rate for the input signal paths is configured by using the applicable IN_RATE, AIFn_RATE, or SLIMRXn_ RATE field; see Table 4-21. Note that sample-rate conversion is required when routing the input signal paths to any signal chain that is configured for a different sample rate. Table 4-7. Digital-Core Mixer Control Registers Register Address Bit Label Default Description R1600 (0x0640) to R2936 (0x0B78) 15 x_STSn Valid for every digital core function input (digital mixers, DSP aux inputs, and ISRC inputs). 0 [Digital Core function] input n status 0 = Disabled 1 = Enabled 7:1 x_VOLn Valid for every digital mixer input. 0x40 [Digital Core mixer] input n volume. (–32 dB to +16 dB in 1-dB steps) 0x00 to 0x20 = –32 dB 0x21 = –31 dB 0x22 = –30 dB ... (1-dB steps) 0x40 = 0 dB ... (1-dB steps) 0x50 = +16 dB 0x51 to 0x7F = +16 dB 7:0 x_SRCn Valid for every digital core function input (digital mixers, DSP aux inputs, and ISRC inputs). 0x00 [Digital Core function] input n source select 0x00 = Silence (mute) 0x04 = Tone generator 1 0x05 = Tone generator 2 0x06 = Haptic generator 0x08 = AEC Loop-Back 1 0x09 = AEC Loop-Back 2 0x0D = Noise generator 0x10 = IN1L signal path 0x11 = IN1R signal path 0x12 = IN2L signal path 0x13 = IN2R signal path 0x20 = AIF1 RX1 0x21 = AIF1 RX2 0x22 = AIF1 RX3 0x23 = AIF1 RX4 0x24 = AIF1 RX5 0x25 = AIF1 RX6 0x28 = AIF2 RX1 0x29 = AIF2 RX2 0x30 = AIF3 RX1 0x31 = AIF3 RX2 0x38 = SLIMbus RX1 0x39 = SLIMbus RX2 0x3A = SLIMbus RX3 0x3B = SLIMbus RX4 0x3C = SLIMbus RX5 0x3D = SLIMbus RX6 0x50 = EQ1 0x51 = EQ2 0x52 = EQ3 0x53 = EQ4 0x58 = DRC1 Left 0x59 = DRC1 Right 0x5A = DRC2 Left 0x5B = DRC2 Right 0x60 = LHPF1 0x61 = LHPF2 0x62 = LHPF3 0x63 = LHPF4 0x68 = DSP1 Channel 1 0x69 = DSP1 Channel 2 0x6A = DSP1 Channel 3 0x6B = DSP1 Channel 4 0x6C = DSP1 Channel 5 0x6D = DSP1 Channel 6 0x70 = DSP2 Channel 1 0x71 = DSP2 Channel 2 0x72 = DSP2 Channel 3 0x73 = DSP2 Channel 4 0x74 = DSP2 Channel 5 0x75 = DSP2 Channel 6 0x78 = DSP3 Channel 1 0x79 = DSP3 Channel 2 0x7A = DSP3 Channel 3 0x7B = DSP3 Channel 4 0x7C = DSP3 Channel 5 0x7D = DSP3 Channel 6 0xA0 = ISRC1 INT1 0xA1 = ISRC1 INT2 0xA2 = ISRC1 INT3 0xA3 = ISRC1 INT4 0xA4 = ISRC1 DEC1 0xA5 = ISRC1 DEC2 0xA6 = ISRC1 DEC3 0xA7 = ISRC1 DEC4 0xA8 = ISRC2 INT1 0xA9 = ISRC2 INT2 0xAA = ISRC2 INT3 0xAB = ISRC2 INT4 0xAC = ISRC2 DEC1 0xAD = ISRC2 DEC2 0xAE = ISRC2 DEC3 0xAF = ISRC2 DEC4 |
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