CS47L35 datasheet(6/300 Pages) CIRRUS

6 / 300 page

DS1085F3

CS47L35

1.2 Pin Descriptions

IN2LP

MICVDD

Left-channel single-ended mic/line input/left-channel positive

differential mic/line input

IN2RN/DMICDAT2

MICVDD or

MICBIASnx

Right-channel negative differential mic/line input/DMIC Data Input 2

IN2RP

MICVDD

Right-channel single-ended mic/line input/right-channel positive

differential mic/line input

JACKDET1

D10

AVDD

Jack detect input 1

JACKDET2

H10

AVDD

Jack detect input 2

MICBIAS1A

—

Microphone bias 1A

MICBIAS1B

—

Microphone bias 1B

MICBIAS2A

—

Microphone bias 2A

MICBIAS2B

—

Microphone bias 2B

MICDET1/HPOUTFB2

E11

—

Microphone and accessory sense input 1/HPOUTL and HPOUTR

ground feedback pin 2

MICVDD

—

LDO2 output decoupling pin (generated internally by CS47L35). (Can

also be used as reference/supply for external microphones.)

SPKOUTN

—

Speaker negative output

SPKOUTP

—

Speaker positive output

VREFC

—

Band-gap reference external capacitor connection

Digital I/O

AIF1BCLK/GPIO9

T12

DBVDD1

I/O

Audio interface 1 bit clock/GPIO. GPIO output is selectable CMOS or

open drain; BCLK output is CMOS.

AIF1LRCLK/GPIO11

R11

DBVDD1

I/O

Audio interface 1 left/right clock/GPIO. GPIO output is selectable

CMOS or open drain; LRCLK output is CMOS.

AIF1RXDAT/GPIO8

P10

DBVDD1

I/O

Audio interface 1 RX digital audio data/GPIO. GPIO output is

selectable CMOS or open drain.

AIF1TXDAT/GPIO10

T10

DBVDD1

I/O

Audio interface 1 TX digital audio data/GPIO. GPIO output is

selectable CMOS or open drain; TXDAT output is CMOS.

AIF2BCLK/GPIO13

DBVDD2

I/O

Audio interface 2 bit clock/GPIO. GPIO output is selectable CMOS or

open drain; BCLK output is CMOS.

AIF2LRCLK/GPIO15

DBVDD2

I/O

Audio interface 2 left/right clock/GPIO. GPIO output is selectable

CMOS or open drain; LRCLK output is CMOS.

AIF2RXDAT/GPIO14

DBVDD2

I/O

Audio interface 2 RX digital audio data/GPIO. GPIO output is

selectable CMOS or open drain.

AIF2TXDAT/GPIO12

DBVDD2

I/O

Audio interface 2 TX digital audio data/GPIO. GPIO output is

selectable CMOS or open drain; TXDAT output is CMOS.

AIF3BCLK/GPIO2

DBVDD2

I/O

Audio interface 3 bit clock/GPIO. GPIO output is selectable CMOS or

open drain; BCLK output is CMOS.

AIF3LRCLK/GPIO4

DBVDD2

I/O

Audio interface 3 left/right clock/GPIO. GPIO output is selectable

CMOS or open drain; LRCLK output is CMOS.

AIF3RXDAT/GPIO3

DBVDD2

I/O

Audio interface 3 RX digital audio data/GPIO. GPIO output is

selectable CMOS or open drain.

AIF3TXDAT/GPIO1

DBVDD2

I/O

Audio interface 3 TX digital audio data/GPIO. GPIO output is

selectable CMOS or open drain; TXDAT output is CMOS.

CIF1MISO

M10

DBVDD1

Control interface 1 (SPI) Master In Slave Out data. The CIFMISO is

high impedance if CIF1SS is not asserted.

CIF1MOSI

DBVDD1

Control interface 1 (SPI) Master Out Slave In data

CIF1SCLK

L11

DBVDD1

Control interface 1 (SPI) clock input

CIF1SS

K10

DBVDD1

Control interface 1 (SPI) slave select (SS)

CIF2SCLK

P12

DBVDD1

Control interface 2 (I2C) clock input

Table 1-1. Pin Descriptions (Cont.)

Name

Ball #

Power

Supply

I/O

Description

CS47L35 Datasheet(PDF) 6 Page - Cirrus Logic

CS47L35 Datasheet(HTML) 6 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL