CS47L35 datasheet(79/300 Pages) CIRRUS

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DS1085F3

CS47L35

4.4 DSP Firmware Control

The register window space is additional to the X-data memory sizes described in Table 4-23. Note that the X-memory

addresses of these register windows are the same for all DSP cores, regardless of the different X-memory sizes.

Addresses 0xC000 to 0xDFFF in X-memory map directly to addresses 0x0000 to 0x1FFF in the device register space.

This fixed register window contains primarily the codec control registers; it also includes the virtual DSP control registers

(described in Section 4.4.6). Each X-memory address within this window maps onto one 16-bit register in the codec

memory space.

Four movable register windows are also provided, starting at X-memory addresses 0xF000, 0xF400, 0xF800, and 0xFC00

respectively. Each window represents 1024 addresses in the X-memory space. The start address, within the

corresponding device register space, for each window is configured using DSPn_EXT_[A/B/C/D]_PAGE (where A defines

the first window, B defines the second window, etc.).

Two mapping modes are supported and are selected using the DSPn_EXT_[A/B/C/D]_PSIZE16 bits for the respective

window. In 16-Bit Mode, each address within the window maps onto one 16-bit register in the device memory space; the

window equates to 1024 x 16-bit registers. In 32-Bit Mode, each address within the window maps onto two 16-bit registers

in the device memory space; the window equates to 1024 x 32-bit registers.

Note that the X-memory is only 24-bits wide; as a result, the upper 8 bits of the odd-numbered register addresses are not

mapped, and cannot be accessed, in 32-Bit Mode.

The DSPn_EXT_[A/B/C/D]_PAGE fields are defined with an LSB = 512. Accordingly, the base address of each window

must be aligned with 512-word boundaries. Note that the base addresses are entirely independent of each other; for

example, overlapping windows are permissible if required, and there is no requirement for the A/B/C/D windows to be at

incremental locations.

The register map window functions are shown in Fig. 4-28. Further information on the definition and usage of the DSP

firmware memories is provided in the software programming guide; contact your Cirrus Logic representative if required.

Note that SYSCLK must be present and enabled, if the DSP firmware requires read or write access to control registers

below address 0x40000. See Section 4.16 for further details of the CS47L35 system clocks.

CS47L35 Datasheet(PDF) 79 Page - Cirrus Logic