CS47L35 datasheet(85/300 Pages) CIRRUS

85 / 300 page

DS1085F3

CS47L35

4.4 DSP Firmware Control

Table 4-26. DMA Control

Bit

Label

Default

Description

DSP1 Base Address = R1048064 (0x0F_FE00)

DSP2 Base Address = R1572352 (0x17_FE00)

DSP3 Base Address = R2096640 (0x1F_FE00)

Base address +0x04

DSPn_Status_1

DSPn_PING_FULL

DSPn WDMA Ping Buffer Status

0 = Not Full

1 = Full

DSPn_PONG_FULL

DSPn WDMA Pong Buffer Status

0 = Not Full

1 = Full

23:16 DSPn_WDMA_ACTIVE_

CHANNELS[7:0]

0x00

DSPn WDMA Channel Status

There are eight WDMA channels; each bit of this field indicates

the status of the respective WDMA channel.

Each bit is coded as follows:

0 = Inactive

1 = Active

Base address +0x10

DSPn_WDMA_Buffer_1

31:16 DSPn_START_ADDRESS_

WDMA_BUFFER_1[15:0]

0x0000

DSPn WDMA Channel 1 Start Address

Bit [15] = Memory select

0 = X-data memory

1 = Y-data memory

Bits [14:0] = Address select

The address is defined relative to the base address of the

applicable data memory. The LSB represents one 24-bit DSP

memory word.

Note that the start address is also controlled by the respective

DSPn_WDMA_CHANNEL_OFFSET bit.

15:0 DSPn_START_ADDRESS_

WDMA_BUFFER_0[15:0]

0x0000

DSPn WDMA Channel 0 Start Address

Field description is as above.

Base address +0x12

DSPn_WDMA_Buffer_2

31:16 DSPn_START_ADDRESS_

WDMA_BUFFER_3[15:0]

0x0000

DSPn WDMA Channel 3 Start Address

Field description is as above.

15:0 DSPn_START_ADDRESS_

WDMA_BUFFER_2[15:0]

0x0000

DSPn WDMA Channel 2 Start Address

Field description is as above.

Base address +0x14

DSPn_WDMA_Buffer_3

31:16 DSPn_START_ADDRESS_

WDMA_BUFFER_5[15:0]

0x0000

DSPn WDMA Channel 5 Start Address

Field description is as above.

15:0 DSPn_START_ADDRESS_

WDMA_BUFFER_4[15:0]

0x0000

DSPn WDMA Channel 4 Start Address

Field description is as above.

Base address +0x16

DSPn_WDMA_Buffer_4

31:16 DSPn_START_ADDRESS_

WDMA_BUFFER_7[15:0]

0x0000

DSPn WDMA Channel 7 Start Address

Field description is as above.

15:0 DSPn_START_ADDRESS_

WDMA_BUFFER_6[15:0]

0x0000

DSPn WDMA Channel 6 Start Address

Field description is as above.

Base address +0x20

DSPn_RDMA_Buffer_1

31:16 DSPn_START_ADDRESS_

RDMA_BUFFER_1[15:0]

0x0000

DSPn RDMA Channel 1 Start Address

Bit [15] = Memory select

0 = X-data memory

1 = Y-data memory

Bits [14:0] = Address select

The address is defined relative to the base address of the

applicable data memory. The LSB represents one 24-bit DSP

memory word.

Note that the start address is also controlled by the respective

DSPn_RDMA_CHANNEL_OFFSET bit.

15:0 DSPn_START_ADDRESS_

RDMA_BUFFER_0[15:0]

0x0000

DSPn RDMA Channel 0 Start Address

Field description is as above.

Base address +0x22

DSPn_RDMA_Buffer_2

31:16 DSPn_START_ADDRESS_

RDMA_BUFFER_3[15:0]

0x0000

DSPn RDMA Channel 3 Start Address

Field description is as above.

15:0 DSPn_START_ADDRESS_

RDMA_BUFFER_2[15:0]

0x0000

DSPn RDMA Channel 2 Start Address

Field description is as above.

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