| Electronic Components Datasheet Search |
|
CS47L35 Datasheet(PDF) 275 Page - Cirrus Logic |
|
|
|||||||||||||||||||||||||||||
CS47L35 Datasheet(HTML) 275 Page - Cirrus Logic |
|
275 / 300 page ![]() DS1085F3 275 CS47L35 6 Register Map R12764 (31DCh) WSEQ_Sequence_239 WSEQ_DATA_WIDTH238 [2:0] WSEQ_ADDR238 [12:0] FFFFFFFFh WSEQ_DELAY238 [3:0] WSEQ_DATA_START238 [3:0] WSEQ_DATA238 [7:0] R12766 (31DEh) WSEQ_Sequence_240 WSEQ_DATA_WIDTH239 [2:0] WSEQ_ADDR239 [12:0] FFFFFFFFh WSEQ_DELAY239 [3:0] WSEQ_DATA_START239 [3:0] WSEQ_DATA239 [7:0] R12768 (31E0h) WSEQ_Sequence_241 WSEQ_DATA_WIDTH240 [2:0] WSEQ_ADDR240 [12:0] FFFFFFFFh WSEQ_DELAY240 [3:0] WSEQ_DATA_START240 [3:0] WSEQ_DATA240 [7:0] R12770 (31E2h) WSEQ_Sequence_242 WSEQ_DATA_WIDTH241 [2:0] WSEQ_ADDR241 [12:0] FFFFFFFFh WSEQ_DELAY241 [3:0] WSEQ_DATA_START241 [3:0] WSEQ_DATA241 [7:0] R12772 (31E4h) WSEQ_Sequence_243 WSEQ_DATA_WIDTH242 [2:0] WSEQ_ADDR242 [12:0] FFFFFFFFh WSEQ_DELAY242 [3:0] WSEQ_DATA_START242 [3:0] WSEQ_DATA242 [7:0] R12774 (31E6h) WSEQ_Sequence_244 WSEQ_DATA_WIDTH243 [2:0] WSEQ_ADDR243 [12:0] FFFFFFFFh WSEQ_DELAY243 [3:0] WSEQ_DATA_START243 [3:0] WSEQ_DATA243 [7:0] R12776 (31E8h) WSEQ_Sequence_245 WSEQ_DATA_WIDTH244 [2:0] WSEQ_ADDR244 [12:0] FFFFFFFFh WSEQ_DELAY244 [3:0] WSEQ_DATA_START244 [3:0] WSEQ_DATA244 [7:0] R12778 (31EAh) WSEQ_Sequence_246 WSEQ_DATA_WIDTH245 [2:0] WSEQ_ADDR245 [12:0] FFFFFFFFh WSEQ_DELAY245 [3:0] WSEQ_DATA_START245 [3:0] WSEQ_DATA245 [7:0] R12780 (31ECh) WSEQ_Sequence_247 WSEQ_DATA_WIDTH246 [2:0] WSEQ_ADDR246 [12:0] FFFFFFFFh WSEQ_DELAY246 [3:0] WSEQ_DATA_START246 [3:0] WSEQ_DATA246 [7:0] R12782 (31EEh) WSEQ_Sequence_248 WSEQ_DATA_WIDTH247 [2:0] WSEQ_ADDR247 [12:0] FFFFFFFFh WSEQ_DELAY247 [3:0] WSEQ_DATA_START247 [3:0] WSEQ_DATA247 [7:0] R12784 (31F0h) WSEQ_Sequence_249 WSEQ_DATA_WIDTH248 [2:0] WSEQ_ADDR248 [12:0] FFFFFFFFh WSEQ_DELAY248 [3:0] WSEQ_DATA_START248 [3:0] WSEQ_DATA248 [7:0] R12786 (31F2h) WSEQ_Sequence_250 WSEQ_DATA_WIDTH249 [2:0] WSEQ_ADDR249 [12:0] FFFFFFFFh WSEQ_DELAY249 [3:0] WSEQ_DATA_START249 [3:0] WSEQ_DATA249 [7:0] R12788 (31F4h) WSEQ_Sequence_251 WSEQ_DATA_WIDTH250 [2:0] WSEQ_ADDR250 [12:0] FFFFFFFFh WSEQ_DELAY250 [3:0] WSEQ_DATA_START250 [3:0] WSEQ_DATA250 [7:0] R12790 (31F6h) WSEQ_Sequence_252 WSEQ_DATA_WIDTH251 [2:0] WSEQ_ADDR251 [12:0] FFFFFFFFh WSEQ_DELAY251 [3:0] WSEQ_DATA_START251 [3:0] WSEQ_DATA251 [7:0] R12792 (31F8h) OTP_HPDET_Cal_1 HP_OFFSET_11 [7:0] HP_OFFSET_10 [7:0] 00000000h HP_OFFSET_01 [7:0] HP_OFFSET_00 [7:0] R12794 (31FAh) OTP_HPDET_Cal_2 SPARE2 [7:0] SPARE1 [7:0] 00000000h HP_GRADIENT_1X [7:0] HP_GRADIENT_0X [7:0] R12796 (31FCh) OTP_Security_1 SECURITY_VALUE [63:48] 00000000h SECURITY_VALUE [47:32] R12798 (31FEh) OTP_Security_2 SECURITY_VALUE [31:16] 00000000h SECURITY_VALUE [15:0] R262146 (40002h) MIF1_I2C_CONFIG_2 0 0 0 000 000 00 000 00 00000000h 00 00 0 MIF1_SLV_ADDR [9:0] MIF1_ ADDR_ MODE R262148 (40004h) MIF1_I2C_CONFIG_3 0 0 0 000 000 00 000 00 00000004h 0 0 0 0 0 MIF1_HS_MASTER_ID [2:0] 0 0 0 0 MIF1_ NACK_ RESPONS E MIF1_ SCL_ MON_ENA MIF1_ RPT_ START MIF1_ START_ BYTE_ ENA R262152 (40008h) MIF1_I2C_CONFIG_5 0 0 0 000 000 00 000 00 00000001h 00 00 0 0 0 MIF1_ WDT_ VALUE_ FRC_ENA 00 00 0 0 0 MIF1_ WDT_ENA R262272 (40080h) MIF1_I2C_STATUS_1 0 0 0 000 000 00 000 00 00000000h 0 0 0 000 000 00 00 MIF1_ WDT_ TIMEOUT_ STS MIF1_ ARBIT_ LOST_ STS MIF1_ NACK_ STS R262400 (40100h) MIF1_CONFIG_1 0 0 0 000 000 00 000 00 00000000h 0 0 0 000 000 00 000 0 MIF1_ START R262404 (40104h) MIF1_CONFIG_3 0 0 0 000 000 00 000 MIF1_WORD_SIZE [1:0] 00000000h 0 0 0 000 000 00 000 0 MIF1_ READ_ WRITE_ SEL R262406 (40106h) MIF1_CONFIG_4 0 0 0 000 000 00 MIF1_TX_LENGTH [20:16] 00000000h MIF1_TX_LENGTH [15:0] R262416 (40110h) MIF1_CONFIG_5 0 0 0 000 000 00 MIF1_RX_LENGTH [20:16] 00000000h MIF1_RX_LENGTH [15:0] R262418 (40112h) MIF1_CONFIG_6 0 0 0 000 000 00 000 00 00000010h 0 0 0 000 00 MIF1_TX_BLOCK_LENGTH [7:0] R262420 (40114h) MIF1_CONFIG_7 0 0 0 000 000 00 000 00 00000010h 0 0 0 0 0 0 0 0 MIF1_RX_BLOCK_LENGTH [7:0] R262422 (40116h) MIF1_CONFIG_8 0 0 0 000 000 00 000 00 00000000h 0 0 0 000 000 00 MIF1_RX_ DONE 00 0 MIF1_TX_ DONE R262528 (40180h) MIF1_STATUS_1 0 0 0 000 000 00 000 00 00000000h 00 00 0 0 0 MIF1_ BUSY_ STS 00 0 MIF1_RX_ REQUEST 00 0 MIF1_TX_ REQUEST Table 6-2. Register Map Definition—32-bit region (Cont.) Register Name 31 15 30 14 29 13 28 12 27 11 26 10 25 9 24 8 23 7 22 6 21 5 20 4 19 3 18 2 17 1 16 0 Default |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |