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ADV7321 Datasheet(PDF) 64 Page - Analog Devices |
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ADV7321 Datasheet(HTML) 64 Page - Analog Devices |
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64 / 88 page ![]() ADV7320/ADV7321 Rev. 0 | Page 64 of 88 For optimum performance, the analog outputs should each be source- and load-terminated, as shown in Figure 91. The termination resistors should be as close as possible to the ADV7320/ADV7321 to minimize reflections. For optimum performance, it is recommended that all decoupling and external components relating to the ADV7320/ADV7321 are located on the same side of the PCB and as close as possible to the ADV7320/ADV7321. Any unused inputs should be tied to ground. 5k Ω VDD_IO 5k Ω VDD_IO COMP1, 2 45 VAA 41 VDD VDD_IO 1 ADV7320/ ADV7321 I2C 19 50 49 48 23 CLKIN_B 63 24 25 33 CLKIN_A 32 EXT_LF 34 UNUSED INPUTS SHOULD BE GROUNDED C0–C9 S0–S9 Y0–Y9 VAA 4.7 µF + 4.7k Ω 820pF 3.9nF VAA GND_ IO 64 AGND 40 DGND 11, 57 I2C BUS 10nF 0.1 µF 10nF 0.1 µF 10, 56 VDD_IO VDD 10nF 1 µF VAA + VAA 0.1 µF POWER SUPPLY DECOUPLING FOR EACH POWER SUPPLY GROUP 36 VAA 0.1 µF DAC D 39 DAC E 38 DAC F 37 DAC A 44 DAC B 43 DAC C 42 VREF 46 1.1k Ω VAA RECOMMENDED EXTERNAL AD1580 FOR OPTIMUM PERFORMANCE 5k Ω VDD_IO SCLK 22 100 Ω 680 Ω SDA 21 ALSB 20 RSET1 RSET2 47 100 Ω 3040 Ω SELECTION HERE DETERMINES DEVICE ADDRESS 35 3040 Ω 5k Ω VDD_IO S_HSYNC S_VSYNC S_BLANK P_HSYNC P_VSYNC P_BLANK RESET 100nF ALL COMPONENTS IN DASHED BOXES MUST BE LOCATED ON THE SAME SIDE OF THE PCB AS THE ADV7320/21 AND AS CLOSE AS POSSIBLE TO THE ADV7320/21. 300 Ω 300 Ω 300 Ω 300 Ω 300 Ω 300 Ω Figure 91. ADV7320/ADV7321 Circuit Layout |
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