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ADV7321 Datasheet(PDF) 78 Page - Analog Devices |
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ADV7321 Datasheet(HTML) 78 Page - Analog Devices |
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78 / 88 page ![]() ADV7320/ADV7321 Rev. 0 | Page 78 of 88 MODE 2— SLAVE OPTION (TIMING REGISTER 0 TR0 = X X X X X 1 0 0) In this mode, the ADV7320/ADV7321 accept horizontal and vertical sync signals. A coincident low transition of both HSYNC and VSYNC inputs indicates the start of an odd field. A VSYNC low transition when HSYNC is high indicates the start of an even field. The BLANK signal is optional. When the BLANK input is disabled, ADV7320/ADV7321 automatically blank all normally blank lines as per CCIR-624. HSYNC, BLANK, and VSYNC are input on S_HSYNC, S_BLANK, and S_VSYNC, respectively. 522 523 524 525 9 10 11 20 21 22 DISPLAY DISPLAY VERTICAL BLANK ODD FIELD EVEN FIELD 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 283 284 285 ODD FIELD EVEN FIELD DISPLAY DISPLAY VERTICAL BLANK 5 7 6 4 3 2 1 8 HSYNC BLANK VSYNC HSYNC BLANK VSYNC Figure 116. SD Slave Mode 2 (NTSC) 622 623 624 625 21 22 23 DISPLAY VERTICAL BLANK ODD FIELD EVEN FIELD DISPLAY 309 310 311 312 313 314 315 316 317 318 319 334 335 336 DISPLAY VERTICAL BLANK ODD FIELD EVEN FIELD DISPLAY 320 7 6 5 4 3 2 1 HSYNC BLANK VSYNC HSYNC BLANK VSYNC Figure 117. SD Slave Mode 2 (PAL) |
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