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ADV7321 Datasheet(PDF) 73 Page - Analog Devices

Part # ADV7321
Description  Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
PDF  88 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADV7321 Datasheet(HTML) 73 Page - Analog Devices

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ADV7320/ADV7321
Rev. 0 | Page 73 of 88
APPENDIX 5—SD TIMING MODES
[Subaddress 0x4A]
MODE 0 (CCIR-656)—SLAVE OPTION
(TIMING REGISTER 0 TR0 = X X X X X 0 0 0)
The ADV7320/ADV7321 are controlled by the SAV (start active
video) and EAV (end active video) time codes in the pixel data.
All timing information is transmitted using a 4-byte
synchronization pattern. A synchronization pattern is sent
immediately before and after each line during active picture and
retrace. If Pins S_VSYNC, S_HSYNC, and S_BLANK are not
used, they should be tied high during this mode. Blank output
is available.
Y
C
r
Y
F
F
0
0
0
0
X
Y
8
0
1
0
8
0
1
0
F
F
0
0
F
F
A
B
A
B
A
B
8
0
1
0
8
0
1
0
F
F
0
0
0
0
X
Y
C
b
Y C
r
C
b
Y
C
b
Y
C
r
EAV CODE
SAV CODE
ANCILLARY DATA
(HANC)
4 CLOCK
4 CLOCK
268 CLOCK
1440 CLOCK
4 CLOCK
4 CLOCK
280 CLOCK
1440 CLOCK
END OF ACTIVE
VIDEO LINE
START OF ACTIVE
VIDEO LINE
ANALOG
VIDEO
INPUT PIXELS
NTSC/PAL M SYSTEM
(525 LINES/60Hz)
PAL SYSTEM
(625 LINES/50Hz)
Y
Figure 109. SD Slave Mode 0



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