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ADV7321 Datasheet(PDF) 26 Page - Analog Devices

Part # ADV7321
Description  Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
PDF  88 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADV7321 Datasheet(HTML) 26 Page - Analog Devices

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ADV7320/ADV7321
Rev. 0 | Page 26 of 88
Table 8. Registers 0x02 to 0x0F
SR7–
SR0
Register
Bit Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register Setting
Reset Values
Reserved
0
0
Zero must be written to
these bits.
0x20
0
Disabled.
Test Pattern Black
Bar
1
Enabled.
0x11, Bit 2 must
also be enabled.
0
Disable manual RGB matrix
adjust.
Manual RGB
Matrix Adjust
1
Enable manual RGB matrix
adjust.
0
No sync.
Sync on RGB1
1
Sync on all RGB outputs.
0
RGB component outputs.
RGB/YPrPb
Output
1
YPrPb component outputs.
0
No sync output.
SD Sync
1
Output SD syncs on
S_HSYNC, S_VSYNC,
S_BLANK pins.
0
No sync output.
0x02
Mode Register 0
HD Sync
1
Output HD, ED, syncs on
S_HSYNC, S_VSYNC.
0x03
RGB Matrix 0
x
x
LSB for GY.
0x03
x
x
LSB for RV.
0xF0
x
x
LSB for BU.
x
x
LSB for GV.
0x04
RGB Matrix 1
x
x
LSB for GU.
0x05
RGB Matrix 2
x
x
x
x
x
x
x
x
Bits 9 to 2 for GY.
0x4E
0x06
RGB Matrix 3
x
x
x
x
x
x
x
x
Bits 9 to 2 for GU.
0x0E
0x07
RGB Matrix 4
x
x
x
x
x
x
x
x
Bits 9 to 2 for GV.
0x24
0x08
RGB Matrix 5
x
x
x
x
x
x
x
x
Bits 9 to 2 for BU.
0x92
0x09
RGB Matrix 6
x
x
x
x
x
x
x
x
Bits 9 to 2 for RV.
0x7C
0x0A
DAC A, B, C Output
Level2
Positive Gain to
DAC Output
Voltage
0
0
0
0
0
0
0
0
0%
0x00
0
0
0
0
0
0
0
1
+0.018%
0
0
0
0
0
0
1
0
+0.036%
…
…
0
0
1
1
1
1
1
1
+7.382%
0
1
0
0
0
0
0
0
+7.5%
Negative Gain to
DAC Output
Voltage
1
1
0
0
0
0
0
0
−7.5%
1
1
0
0
0
0
0
1
−7.382%
1
0
0
0
0
0
1
0
−7.364%
…
…
1
1
1
1
1
1
1
1
−0.018%
0x0B
DAC D, E, F Output
Level
Positive Gain to
DAC Output
Voltage
0
0
0
0
0
0
0
0
0%
0x00
0
0
0
0
0
0
0
1
+0.018%
0
0
0
0
0
0
1
0
+0.036%
…
…
0
0
1
1
1
1
1
1
+7.382%
0
1
0
0
0
0
0
0
+7.5%
Negative Gain to
DAC Output
Voltage
1
1
0
0
0
0
0
0
−7.5%
1
1
0
0
0
0
0
1
−7.382%
1
0
0
0
0
0
1
0
−7.364%
…
…
1
1
1
1
1
1
1
1
−0.018%
0x0C
Reserved
0x00
0x0D
Reserved
0x00
0x0E
Reserved
0x00
0x0F
Reserved
0x00
1 For more detail, refer to Appendix 7.
2 For more detail on the programmable output levels, refer to the Programmable DAC Gain Control section.



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