BT261 datasheet(25/56 Pages) ETC

Part #	BT261

Description	30 MHz Pixel Clock Monolithic CMOS HSYNC Line Lock Controller

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Manufacturer	ETC [List of Unclassifed Manufacturers]

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CIRCUIT DESCRIPTION

Pin Descriptions

L261_H

Bt261

30 MHz Pixel Clock Monolithic CMOS HSYNC Line Lock Controller

WR*

Write control input (TTL compatible). If WR* is a logical zero, data is written into the device

via D0–D7. Data is latched on the rising edge of WR*. RD* and WR* should not be

asserted simultaneously.

D0–D7

Bidirectional data bus (TTL compatible). MPU data is transferred into and out of the device

over this 8-bit data bus. If RD* is a logical one, D0–D7 are three-stated.

Address control inputs (TTL compatible). A0 speciﬁes whether the MPU is accessing the

address register (A0 = 0) or the control register speciﬁed by the address register (A0 = 1).

VCC

Power.

GND

Ground.

Table 2. Pin Descriptions Grouped By Pin Function

Pin Name

Description

Figure 8. Bt261 Pinout Diagram

OSC1

OSC1*

VSYNC*

FIELD

CAPTURE

CSYNC*

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BT261 Datasheet(PDF) 25 Page - List of Unclassifed Manufacturers