BT261 datasheet(45/56 Pages) ETC

45 / 56 page

Brooktree®

APPLICATION INFORMATION

Interfacing to the Bt254

L261_H

Bt261

30MHz Pixel Clock Monolithic CMOS HSYNC Line Lock Controller

Interfacing to the Bt254

Figure 13 illustrates the interface of the Bt261 to the Bt254 Image Digitizer. The

VIDEO input of the Bt261 connects directly to the CSYNC* output of the Bt254.

As CSYNC* is a TTL-compatible output, the highest sync slicing level should be

selected on the Bt261.

The Bt261 provides the ZERO and CLAMP signals required by the Bt254, in

addition to the (R,G,B) CLOCK inputs of the Bt254.

The HSYNC, VSYNC*, FIELD, and CAPTURE signals of the Bt261 interface to

the video timing controller and video DRAM controller.

ESD and Latchup Considerations

Correct ESD-sensitive handling procedures are required to prevent device damage,

which can produce symptoms of catastrophic failure or erratic device behavior

with somewhat "leaky" inputs.

Latchup can be prevented by ensuring that all VCC pins are at the same poten-

tial and that the VCC supply voltage is applied before the signal pin voltages. The

correct power-up sequence ensures that any signal pin voltage will never exceed

the power supply voltage by more than +0.5 V.

Figure 13. Interfacing to the Bt254

VIDEO

ZERO

CLAMP CLOCK

CSYNC*

ZERO

CLAMP RCLOCK GCLOCK

BCLOCK

Bt254

Bt261

HSYNC

VSYNC*

FIELD

CAPTURE

To Video Timing

Controller And

DRAM Controller

BT261 Datasheet(PDF) 45 Page - List of Unclassifed Manufacturers