BT261 datasheet(6/56 Pages) ETC

6 / 56 page

Brooktree®

L261_H

Bt261

30 MHz Pixel Clock Monolithic CMOS HSYNC Line Lock Controller

LIST OF FIGURES

List of Figures

Figure 1.

Operation of FIELD and CAPTURE Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 2.

External VCO Conﬁguration.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 3.

(a) Actual Gate-Level Implementation of Phase Limiting and Noise Gating (b,c, and d) Min-

imized Block Diagrams Corresponding to Waveforms in Figure 5 12

Figure 4.

Phase-Comparator State Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 5.

Examples of Phase Comparator Operation With Different Types of Error and Different Im-

plementations of Phase Limiting and Noise Gating 14

Figure 6.

PLL Performance Can Be Monitored Using SR05 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 7.

Pixel Clock Output Timing When Generated From Higher Speed Oscillator . . . . . . . . . . 17

Figure 8.

Bt261 Pinout Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 9.

Bt261 Suggested Register Settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 10. Operation of the Bt261 with the 74HC4046A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Figure 11. Interfacing the Bt218. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Figure 12. Interfacing to the Bt252 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Figure 13. Interfacing to the Bt254. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

BT261 Datasheet(PDF) 6 Page - List of Unclassifed Manufacturers