BT261 datasheet(1/56 Pages) ETC

Part #	BT261

Description	30 MHz Pixel Clock Monolithic CMOS HSYNC Line Lock Controller

PDF	56 Pages

Scroll/Zoom	100%

Manufacturer	ETC [List of Unclassifed Manufacturers]

Direct Link

Logo

1 / 56 page

Brooktree®

Brooktree Division • Rockwell Semiconductor Systems, Inc. • 9868 Scranton Road • San Diego, CA 92121-3707

619-452-7580 • 1-800-2-BT-APPS • FAX: 619-452-1249 • Internet: apps@brooktree.com • L261_H

Distinguishing Features

•

Programmable 12-bit Video Timing

•

Bidirectional HSYNC and CLOCK

Pins

•

Horizontal Sync Noise Gating

•

External VCO Support

•

Standard MPU Interface

•

TTL Compatible

•

+ 5 V Monolithic CMOS

•

28-pin PLCC Package

•

Typical Power Dissipation:

300˙mW

Applications

•

Image Processing

•

Video Digitizing

•

Desktop Publishing

•

Graphic Art Systems

The Bt261 HSYNC Line Lock Controller is designed speciﬁcally for image cap-

ture applications.

Either composite video or TTL composite sync information is input via

VIDEO. An internal sync separator separates horizontal and vertical sync infor-

mation. Programmable horizontal and vertical video timing enables recovery of

both standard and nonstandard timing information.

An external VCO may be used in conjunction with the on-chip phase com-

parator for implementation of clocks locked to the horizontal frequency.

Alternately, a high-speed clock (OSC) may be divided down to generate the

pixel clock. The phase of the generated pixel clock is adjusted to align with the

noise-gated CSYNC. The higher the OSC clock rate, the lower the pixel clock

jitter (the maximum being one half the OSC clock period). The OSC inputs may

be conﬁgured to be either TTL or ECL compatible. Thus, four TTL clocks, two

TTL clocks and one differential ECL clock, or two differential ECL clocks may

be used. The ECL clock inputs are designed to be driven by 10KH ECL using a

single +5 V supply.

The CLAMP and ZERO outputs are programmed by the MPU to DC restore

the video signal and to zero the Image Digitizer or A/D converter at the appro-

priate time.

Functional Block Diagram

30 MHz Pixel Clock Monolithic

CMOS HSYNC Line Lock Controller

Bt261

PCOUT

SYNC

Noise Gate

Horizontal

Video

Timing

Control

OSC1

OSC1*

OSC2

OSC2*

M

U

X

Horizontal

Counter

Vertical

SYNC

Processor

SYNC

Detect

Noise-Gated CSYNC*

Phase

Comparator

XTAL OSC to

Pixel Clock

Generator

3-State

Buffer

HSYNC

VIDEO

CLOCK

ZERO

CLAMP

HSYNC

CAPTURE

VSYNC*

FIELD

CSYNC*

D0–D7

RD*

WR*

A0

Similar Part No. - BT261

Manufacturer	Part #	Datasheet	Description
Altech corporation	BT2	152Kb / 1P	30 mm Rubber Boots BTx (x=color)
Marki Microwave	BT2-0026	759Kb / 5P	HIGH POWER BIAS TEE
	BT2-0040	559Kb / 5P	HIGH POWER BIAS TEE
	BT2-0050	566Kb / 5P	HIGH POWER BIAS TEE
Banner Engineering Corp...	BT2.52PM600	15Mb / 42P	Fiber Optic Systems

More results

Similar Description - BT261

Manufacturer	Part #	Datasheet	Description
STMicroelectronics	TDA9207	262Kb / 22P	150 MHz PIXEL VIDEO CONTROLLER FOR MONITORS INCLUDING CUT-OFF INPUTS Mar-2000
STMicroelectronics	TDA9210	206Kb / 19P	150 MHz PIXEL VIDEO CONTROLLER FOR MONITORS Mar-2000
Integrated Circuit Syst...	MK1573-02	84Kb / 6P	GenClock??HSYNC to Video Clock Revision 120497
Intersil Corporation	82C85	363Kb / 21P	CMOS Static Clock Controller/Generator March 1997
List of Unclassifed Man...	FS6131-01	434Kb / 39P	Programmable Line Lock Clock Generator IC
Motorola, Inc	MC44145	73Kb / 8P	PIXEL CLOCK GENERATOR / SYNC SEPARATOR
PulseCore Semiconductor	PCS1P2192A	143Kb / 8P	VDP Multiple Pixel Clock Generator
ON Semiconductor	PCS1P2192A	140Kb / 7P	VDP Multiple Pixel Clock Generator JANUARY 2010 ??Rev. 2
ON Semiconductor	FS6131	745Kb / 44P	Programmable Line Lock Clock Generator IC May 2008 ??Rev. 4
Renesas Technology Corp	82C85	978Kb / 21P	CMOS Static Clock Controller/Generator March 1997

More results

BT261 Datasheet(PDF) 1 Page - List of Unclassifed Manufacturers

BT261 Datasheet(HTML) 1 Page - List of Unclassifed Manufacturers

Similar Part No. - BT261

Similar Description - BT261

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

Datasheet Download

Link URL