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BT261 Datasheet(PDF) 33 Page - List of Unclassifed Manufacturers |
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BT261 Datasheet(HTML) 33 Page - List of Unclassifed Manufacturers |
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33 / 56 page ![]() Brooktree® 27 L261_H INTERNAL REGISTERS Status Register Bt261 30 MHz Pixel Clock Monolithic CMOS HSYNC Line Lock Controller Table 3. Bt261 Suggested Register Settings Pixel Clock Rate NTSC(M) 12.2 MHz dec hex PAL (B, G, I) 14.75 MHz dec hex Line Rate 63.556 µs 64.0 µs (HCOUNT) Number of pixels minus 1 (Noise Gate) (HSYNC) Negative polarity, 4.7 µs wide (CLAMP) One may CLAMP on burst back porch or sync tip (ZERO) (Field Gate) (VSYNC) This gives FIELD = 0, 1 for field one and two, respectively Start 7 µs Stop 61.76 µs Start 4.7 µs Stop 0 µs Start 8.5 µs Stop 9 µs Start 8.5 µs Stop 8.75 µs Start 15 µs Stop 45 µs 8 µs 779 88 758 59 0 107 113 107 110 189 566 98 30B 58 2F6 3B 0 6B 71 6B 6E BD 236 62 943 104 917 70 0 126 134 126 130 223 668 118 3AF 68 395 46 0 7E 86 7E 82 DF 29C 76 |
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