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CLRC663 Datasheet(PDF) 103 Page - NXP Semiconductors |
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CLRC663 Datasheet(HTML) 103 Page - NXP Semiconductors |
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103 / 177 page ![]() NXP Semiconductors CLRC663 High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus Bit Symbol Description 9h - 1 out of 256 code (range 0 - 255) [ICODE SLI] Ah - 1 out of 256 code (range 0 - 255; 00h is encoded with no modulation, value 256 not used) [ICODE 1] Bh - 1 out of 256 code (range 0 - 255; 00h is encoded with a pulse on last position) [ICODE quite value] Ch- Pulse internal encoded (PIE) [ISO/IEC 18000-3 mode 3/ EPC Class-1HF] Dh - RFU Eh - RFU Fh - RFU 3 DSCFreq Specifies the subcarrier frequency of the used envelope. 0h - 424 kHz 1h - 848 kHz Note: This setting is only relevant, if an envelope is used which involves a subcarrier, e.g. Manchester with subcarrier coding. 2 to 0 DBFreq Specifies the frequency of the bit stream: 0h - RFU 1h - RFU 2h - 26 kHz 3h - 53 kHz 4h - 106 kHz 5h - 212 kHz 6h - 424 kHz 7h - 848 kHz Table 204. TxDataCon bits...continued 9.16.3 TxDataMod Bit 7 6 5 4 3 2 1 0 Symbol Frame step DMillerEn DPulseType DInvert DEnvType Access rights r/w r/w r/w r/w r/w Table 205. TxDataMod register (address 4Bh) Bit Symbol Description 7 Framestep If set to 1, at every start of transmission, each byte of data is sent in a separate frame. SOF and EOF are appended to the data byte according to the framing settings. After one byte is transmitted, the TxEncoder waits for a new start trigger to continue with the next byte (trigger is generated automatically). If set to 0, transmission is done in the used way, where after a start trigger all data bytes are sent and the framing is done for the complete data stream only once. 6 DMillerEn If set, pulse modulation is applied according to modified miller code. Note: This bit is intended to be set if DPulseType is 1h. 5 to 4 DPulseType Specifies which type of pulse modulation is selected. 0 h - no pulse modulation 1h - pulse starts at beginning of bit 2h - pulse starts at beginning of second bit half Table 206. TxDataMod bits CLRC663 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 5.3 — 3 January 2024 103 / 177 |
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