CLRC663 datasheet(110/177 Pages) NXP

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NXP Semiconductors

CLRC663

High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus

Bit

Symbol

Description

RxStopOnLength

If set to 1, data reception stops when the number of received bytes reach

the defined frame length. The value for the frame length is taken from the

first data-byte received.

RxMSBFirst

If set to 1, data bytes are interpreted MSB first for data reception, which

means data is converted at the CLCoPro interface. If this bit is set to 0, data

is interpreted LSB first.

RxStopBitEn

If set, a stop-bit is expected and will be checked and extracted from

data stream. Additionally on detection of a stop-bit a reset signal for the

demodulator is generator to enable a resynchronization of the demodulator.

If the expected stop-bit is incorrect, a frame error flag is set and the

reception is aborted.

Note: A stop bit is always considered to be a logic 1

RxParityType

Defines which type of the parity-bit is calculated:

If cleared: Even parity

If set: Odd parity

RFU

Table 232. RxBitMod bits...continued

9.17.2 RxEofSym

Bit

Symbol

RxEOFSymbol

Access

rights

r/w

Table 233. RxEofSym (address 59h)

Bit

Symbol

Description

7 to 0

RxEOF

Symbol

This value defines the pattern of the EOF symbol with a maximum length of 4 bit. Every

tuple of 2 bits of the RxEOFSymbol encodes one bit of the EOF symbol. A 00 tuple

closes the symbol. In this way symbols with less than 4 bits can be defined, starting with

the bit0 and bit1. The leftmost active symbol pattern is processed first, which means the

pattern is expected first. If the bit0 and bit1 are both zero, the EOF symbol is disabled.

The following mapping is defined:

0h - no symbol bit

1h - zero value

2h - one value

3h - collision

Example:

1Dh: Zero-Collision-Zero

E8h: No symbol because two LSBits are zero

Table 234. RxEOFSym bits

CLRC663

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Product data sheet

Rev. 5.3 — 3 January 2024

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