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CLRC663 Datasheet(PDF) 109 Page - NXP Semiconductors

Part # CLRC663
Description  High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus
PDF  177 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

CLRC663 Datasheet(HTML) 109 Page - NXP Semiconductors

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NXP Semiconductors
CLRC663
High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus
9.16.13 TxSym32Mod
Bit
7
6
5
4
3
2
1
0
Symbol
RFU
S32MillerEn
S32PulseType
S32Inv
S32EnvType
Access
rights
-
r/w
r/w
r/w
r/w
Table 229. TxSym32Mod register (address 57h)
Bit
Symbol
Description
7
RFU
-
6
S32MillerEn
If set, pulse modulation is applied according to modified miller code.
Note: This bit shall be set only if S32PulseType is set to 1h.
5 to 4
S32PulseType
Specifies which type of pulse modulation is selected:
0h - no pulse modulation
1h - pulse starts at beginning of bit
2h - pulse starts at beginning of second bit half
3h - pulse starts at beginning of third bit quarter
3
S32Inv
If set. the output of Symbol2 and Symbol3 is inverted.
2 to 0
S32EnvType
Specifies the type of envelope used for transmission of symbol 0 and symbol 1. The bit
stream is logically combined with the selected envelope type.
0h - Direct output
1h - Manchester code
2h - Manchester code with subcarrier
3h - BPSK
4h - RZ return zero, pulse of half bit length at beginning of second half of bit)
5h - RZ return zero, pulse of half bit length at beginning of bit)
6h to 7h RFU
Table 230. TxSym32Mod bits
9.17 Receiver configuration
9.17.1 RxBitMod
Bit
7
6
5
4
3
2
1
0
Symbol
RFU
RFU
RxStopOnInvPar RxStopOnLength
RxMSBFirst
RxStopBitEn RxParityType
RFU
Access
rights
-
-
r/w
r/w
r/w
r/w
r/w
-
Table 231. RxBitMod (address 58h)
Bit
Symbol
Description
7 to 6
RFU
-
5
RxStopOnInvPar
If set to 1, inverse parity bit is a stop condition.
Table 232. RxBitMod bits
CLRC663
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 5.3 — 3 January 2024
109 / 177



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