Data Sheet

ADPL76030

analog.com

Rev.0

30 of 40

TJ= TA+ P × RTH(JA)

The junction-to-ambient thermal resistance RTH(JA) includes the junction-to-case thermal resistance RTH(JC) and the

case-to-ambient thermal resistance RTH(CA). This value of TJ can then be compared to the original, assumed value used

in the iterative calculation process.

Optional Schottky Diode (D

B, DD) Selection

The optional Schottky diodes DB (in parallel with switch B) and DD (in parallel with switch D) conduct during the dead

time between the conduction of the power MOSFET switches. They are intended to prevent the body diode of

synchronous switches B and D from turning on and storing charge during the dead time. In particular, DB significantly

reduces reverse recovery current between switch B turn-off and switch A turn-on, and DD significantly reduces reverse

recovery current between switch D turn-off and switch C turn-on. They improve converter efficiency and reduce

switch voltage stress. For the diode to be effective, the inductance between it and the synchronous switch must be

as small as possible, mandating that these components be placed adjacently.

C

IN and COUT Selection

Input and output capacitance is necessary to suppress voltage ripple caused by discontinuous current moving in and

out the regulator. A parallel combination of capacitors is typically used to achieve high capacitance and low

equivalent series resistance (ESR). Dry tantalum, special polymer, aluminum electrolytic, and ceramic capacitors are

all available in surface mount packages.

Capacitors with low ESR and high ripple current ratings, such as OS-CON and POSCAP are also available. Ceramic

capacitors should be placed near the regulator input and output to suppress high frequency switching spikes.

Ceramic capacitors, of at least 1µF, should also be placed from VIN to GND and VOUT to GND as close to the ADPL76030

pins as possible. Due to their excellent low ESR characteristics, ceramic capacitors can significantly reduce input

ripple voltage and help reduce power loss in the higher ESR bulk capacitors. X5R or X7R dielectrics are preferred, as

these materials retain their capacitance over wide voltage and temperature ranges. Many ceramic capacitors,

particularly 0805 or 0603 case sizes, have greatly reduced capacitance at the desired operating voltage.

Input Capacitance C

IN

Discontinuous input current is highest in the buck region due to the switch A toggling on and off. Make sure that the

CIN capacitor network has low enough ESR and is sized to handle the maximum RMS current. In the buck region, the

input RMS current is given by:

IRMS ≈ IOUT(MAX) ×

VOUT

VIN

× √

VIN

VOUT

− 1

The formula has a maximum at VIN = 2VOUT, where IRMS = IOUT(MAX)/2. This simple worst-case condition is commonly used

for design because even significant deviations do not offer much relief.

Output Capacitance C

OUT

Discontinuous current shifts from the input to the output in the boost region. Make sure that the COUT capacitor

network is capable of reducing the output voltage ripple. The effects of ESR and the bulk capacitance must be

considered when choosing the right capacitor for a given output ripple voltage. The maximum steady state ripple

due to charging and discharging the bulk capacitance is given by:

∆VCAP(BOOST) =

IOUT(MAX) × (VOUT − VIN(MIN))

COUT × VOUT × f