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ADPL76030 Datasheet(PDF) 24 Page - Analog Devices |
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ADPL76030 Datasheet(HTML) 24 Page - Analog Devices |
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24 / 40 page ![]() Data Sheet ADPL76030 analog.com Rev.0 24 of 40 During the UP/RUN state, the switching is enabled and the start-up of the output voltage VOUT is controlled by the voltage on the SS pin. When the SS pin voltage is less than 1 V, the ADPL76030 regulates the FB pin voltage to the SS pin voltage instead of the 1 V reference. This allows the SS pin to be used to program soft-start by connecting an external capacitor from the SS pin to GND. The internal 12.5 µA pull-up current charges up the capacitor, creating a voltage ramp on the SS pin. As the SS pin voltage rises linearly from 0.25 V to 1 V (and beyond), the output voltage VOUT rises smoothly to its final regulation voltage. Once the SS pin is charged above 1.75 V, the ADPL76030 enters the OK/RUN state, where the output short detection is activated. The output short means VFB < 0.25 V. When the output short happens, the ADPL76030 enters the FAULT/ RUN state, where a 1.25 µA pull-down current slowly discharges the SS pin with the other conditions the same as the OK/RUN state. Once the SS pin is discharged below 1.7 V, the ADPL76030 enters the DOWN/STOP state, where the switching is disabled, and the short detection is deactivated with the previous fault latched. Once the SS pin is discharged below 0.2 V and the LOADON signal is still high, the ADPL76030 goes back to the UP/RUN state. In an output short condition, the ADPL76030 can be set to hiccup, latch-off, or keep-running fault protection mode with a resistor between the SS and VREF pins. Without any resistor, the ADPL76030 hiccups between 0.2 V and 1.75 V, and goes around the UP/RUN, OK/RUN, FAULT/RUN, and DOWN/STOP states until the fault condition is cleared. With a 499 kΩ resistor, the ADPL76030 latches off until the EN/UVLO is toggled. With a 100 kΩ resistor, the ADPL76030 keeps running regardless of the fault. |
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