Data Sheet

ADPL76030

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Rev.0

31 of 40

∆VCAP(BUCK) =

VOUT × (1 −

VOUT

VIN(AX)

)

8

× L × f

2 × C

OUT

The maximum steady ripple due to the voltage drop across the ESR is given by:

∆VESR(BOOST) =

VOUT × IOUT(MAX)

VIN(MIN)

× ESR

∆VESR(BUCK) =

VOUT × (1 −

VOUT

VIN(MAX)

)

L

× f

× ESR

INTV

CC Regulator

An internal P-channel low dropout regulator produces 5 V at the INTVCC pin from the VIN supply pin. The INTVCC powers

the internal circuitry and gate drivers in the ADPL76030. The INTVCC regulator can supply an average current of 145

mA and must be bypassed to ground with a minimum of 4.7 µF ceramic capacitor. Good local bypass is necessary to

supply the high transient current required by MOSFET gate drivers.

Higher input voltage applications with large MOSFETs being driven at higher switching frequencies may cause the

maximum junction temperature rating for the ADPL76030 to be exceeded. The system supply current is normally

dominated by the gate charge current. Additional external loading of the INTVCC also needs to be taken into account

for the power dissipation calculation. The total ADPL76030 power dissipation in this case is VIN × IINTVCC, and overall

efficiency is lowered. The junction temperature can be estimated using the equation:

TJ= TA+ PD× θJA

where, θJA (in °C/W) is the package thermal resistance.

To prevent maximum junction temperature from being exceeded, the input supply current must be checked

operating in the continuous mode at maximum VIN.

Top Gate MOSFET Driver Supply (C

BST1, CBST2)

The top MOSFET drivers, TG1 and TG2, are driven between their respective SW and BST pin voltages. The boost

voltages are biased from floating bootstrap capacitors CBST1 and CBST2, which are normally recharged through both

the external and internal bootstrap diodes when the respective top MOSFET is turned off. External bootstrap diodes

are recommended because the internal bootstrap diodes are not always strong enough to refresh top MOSFETs at

1.4 MHz. Both capacitors are charged to the same voltage as the INTVCC voltage. The bootstrap capacitors CBST1 and

CBST2 need to store about 100 times the gate charge required by the top switches A and D. In most applications, a 0.1

µF to 0.47 µF, X5R or X7R dielectric capacitor is adequate.

Programming V

IN UVLO

A resistor divider from VIN to the EN/UVLO pin implements VIN undervoltage lockout (UVLO). The EN/UVLO enable

falling threshold is set at 1.220 V. In addition, the EN/UVLO pin sinks 2.5 µA when the voltage on the pin is below 1.220

V. This current provides user programmable hysteresis based on the value of R1. The programmable UVLO thresholds

are:

VIN(ULVO+) = 1.233 V ×

R1 + R2

R2

+ 2.5 μA × R1