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ADPL76030 Datasheet(PDF) 10 Page - Analog Devices

Part # ADPL76030
Description  55 V, 1.4 MHz Synchronous 4-Switch Buck-Boost Controller with Spread Spectrum
PDF  40 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADPL76030 Datasheet(HTML) 10 Page - Analog Devices

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Data Sheet
ADPL76030
analog.com
Rev.0
10 of 40
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 3. PIN CONFIGURATION
Table 4. Pin Descriptions
PIN
NAME
DESCRIPTION
1
TG1
Buck Side Top Gate Drive. Drives the gate of buck side top N-channel MOSFET with a
voltage swing from SW1 to BST1.
2
LSP
Positive Terminal of the Buck Side Inductor Current-Sense Resistor (RSENSE). Ensure
accurate current sense with Kelvin connection.
3
LSN
Negative Terminal of the Buck Side Inductor Current-Sense Resistor (RSENSE). Ensure
accurate current sense with Kelvin connection.
4
VIN
Input Supply. The VIN pin must be tied to the power input to determine the buck, buck-
boost, or boost operation regions. Locally bypass this pin to ground with a minimum 1
µF ceramic capacitor.
5
INTVCC
Internal 5 V Linear Regulator Output. The INTVCC linear regulator is supplied from the
VIN pin, and powers the internal control circuitry and gate drivers. Locally bypass this
pin to ground with a minimum 4.7 µF ceramic capacitor.
6
EN/UVLO
Enable and Undervoltage Lockout. Force the pin below 0.3 V to shut down the part and
reduce VIN quiescent current below 2 µA. Force the pin above 1.233 V for normal
operation. The accurate 1.220 V falling threshold can be used to program an
undervoltage lockout (UVLO) threshold with a resistor divider from VIN to ground. An
accurate 2.5 µA pull-down current allows the programming of VIN UVLO hysteresis. If
neither function is used, tie this pin directly to VIN.
7
TEST1
Factory Test Pin. This pin is used for testing purpose only and must be directly
connected to ground for the part to operate properly.
8
TEST2
Factory Test Pin. This pin is used for testing purposes only and must be tied to VREF for
the part to operate properly.
9
10
TOP VIEW
29
GND
11 12 13
28 27 26 25 24
14
23
6
5
4
3
2
1
TG1
TG2
7
17
18
19
20
21
22
16
8
15
VOUT
DNC
SYNC/SPRD
RT
VC
FB
SS
LSP
LSN
VIN
INTVCC
EN/UVLO
TEST1
TEST2
NOTES
1. θJA = 43°C/W, θJC = 3.4°C/W.
2. EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB.
ADPL76030​



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