Data Sheet

ADPL76030

analog.com

Rev.0

32 of 40

VIN(ULVO−) = 1.220 V ×

R1 + R2

R2

Figure 46 shows the implementation of external shutdown control while still using the UVLO function. The NMOS

grounds the EN/UVLO pin when turned on, and puts the ADPL76030 in shutdown with quiescent current less than 2

µA.

Figure 46.VIN Undervoltage Lockout (UVLO)

Programming Input or Output Current Limit

The input or output current limit can be programmed by placing an appropriate value current-sense resistor, RIS in

the input or output power path. The voltage drop across RIS is (Kelvin) sensed by the ISP and ISN pins. The CTRL pin

should be tied to a voltage higher than 1.35 V to get the full-scale 100 mV (typical) threshold across the sense resistor.

The CTRL pin can be used to reduce the current threshold to zero, although relative accuracy decreases with the

decreasing sense threshold. When the CTRL pin voltage is between 0.3 V and 1.15 V, the current limit is:

IIS(MAX) =

VCTRL − 0.25 V

10

× RIS

When VCTRLis between 1.15 V and 1.35 V, the current limit varies with VCTRL, but departs from the equation above by

an increasing amount as VCTRL increases. Ultimately, when VCTRL is larger than 1.35 V, the current limit no longer

varies. Table 6 lists the typical V(ISP-ISN) threshold vs. VCTRL.

Table 6. V(ISP-ISN) Threshold vs. VCTRL

VCTRL (V)

V(ISP-ISN) (mV)

1.15

90

1.20

94.5

1.25

98

1.30

99.5

1.35

100

When VCTRL is larger than 1.35 V, the current threshold is regulated to:

IIS(MAX) =

100 mV

RIS

The CTRL pin should not be left open (tie to VREF if not used). The CTRL pin can also be used in conjunction with a

thermistor to provide overtemperature protection for the output load, or with a resistor divider to VIN to reduce

output power and switching current when VIN is low.

The presence of a time varying differential voltage ripple signal across the ISP and ISN pins at the switching frequency

is expected. If the current-sense resistor RIS is placed between the power input and input bulk capacitor (Figure 47),

or between the output bulk capacitor and system output (Figure 49), a filter is typically not necessary. If the RIS is

placed between the input bulk capacitor and input decoupling capacitor (Figure 48), or between the output

ADPL76030

VIN

R1

R2

RUN/STOP

CONTROL

(OPTIONAL)

EN/UVLO

GND