Data Sheet

ADPL76030

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Rev.0

22 of 40

Figure 41. Peak-Boost in Boost Region (VIN << VOUT)

Main Control Loop

The ADPL76030 is a fixed frequency current-mode controller. The inductor current is sensed through the inductor

sense resistor between the LSP and LSN pins. The current-sense voltage is gained up by amplifier A1 and added to a

slope compensation ramp signal from the internal oscillator. The summing signal is then fed into the positive

terminals of the buck current comparator A3 and boost current comparator A4. The negative terminals of A3 and A4

are controlled by the voltage on the VC pin, which is the diode-OR of error amplifiers EA1 and EA2.

Depending on the state of the peak-buck, peak-boost current-mode control, either the buck logic or the boost logic

controls the four power switches so that either the FB voltage is regulated to 1 V or the current-sense voltage between

the ISP and ISN pins is regulated by the CTRL pin during normal operation. The gains of EA1 and EA2 are balanced to

ensure smooth transition between constant-voltage and constant-current operation with the same compensation

network.

Light Load Current Operation

At light load, the ADPL76030 runs either at full switching frequency discontinuous conduction mode or pulse-

skipping mode, where the switches are held off for multiple cycles (that is, skipping pulses) to maintain the regulation

and improve the efficiency. Both the buck and boost reverse current-sense thresholds are set to 1 mV (typical) so

that no reverse inductor current is allowed.

In the buck region, switch B is turned off whenever the buck reverse current threshold is triggered during (B + D)

phase. In the boost region, switch D is turned off whenever the boost reverse current threshold is triggered during (A

+ D) phase. In the buck-boost region, switch D is turned off whenever the boost reverse current threshold is triggered

during (A + D) phase, and both switches B and D are turned off whenever the buck reverse current threshold is

triggered during (B + D) phase.

Internal Charge Path

Each of the two top MOSFET drivers is biased from its floating bootstrap capacitor, which is normally recharged by

INTVCC through both the external and internal bootstrap diodes when the top MOSFET is turned off. When the

ADPL76030 operates exclusively in the buck or boost regions, one of the top MOSFETs is constantly on. An internal

charge path, from VOUT and BST2 to BST1, or from VIN and BST1 to BST2, charges the bootstrap capacitor to 4.6 V so

that the top MOSFET can be kept on.

A

B

C

100% ON

100% OFF

D

IL

A+D

A+C

A+D

A+C