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PM3350-SW Datasheet(PDF) 149 Page - PMC-Sierra, Inc |
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PM3350-SW Datasheet(HTML) 149 Page - PMC-Sierra, Inc |
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149 / 224 page ![]() ELAN 8X10 PM3350 ELAN 8 X10 DATA SHEET PMC-970109 ISSUE 3 8 PORT ETHERNET SWITCH PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND PMC-SIERRA, INC. CUSTOMERS ONLY 147 The PCI data transfer rate is therefore: {2*num_pm3351 * 1 (Mlp) * 1 (Mports) * 1 (Mrfr) * 1 (Mdplx) * 0.125 bits/ns (max Mpfsz) * 1 (Mdest for unicast)} + {3*num_pm3350 * 1 (Mlp) * 8 (Mports) * 1 (Mrfr) * 0.5 (Mdplx) * 0.0125 bits/ns (max Mpfsz) * 1 (Mdest for unicast)} = (0.25 bits/ns + 0.20 bits/ns) = 450 Mbit/sec Since this number is less than 500 Mbit/sec the switch configuration will be non- blocking. EXAMPLE #2: Lets examine the maximum sustainable broadcast frame for a 2 port -100 Mb, 24-port 10 Mb switch constructed using two PM3351 and three PM3350 chips assuming: • the 100 Mbit ports are full-duplex and the 10 Mbit ports are half-duplex PCI bus max transfer rate is 500 Mbit/sec < {2*num_pm3351 * 1 (Mlp) * 1 (Mports) * 1 (Mrfr_max_learn) * 1 (Mdplx) * 0.125 bits/ns (max Mpfsz) * 3 (Mdest since three other chips in the system)} + {2*num_pm3350 * 1 (Mlp) * 8 (Mports) * 1 (Mrfr_max_learn) * 0.5 (Mdplx) * 0.0125 bits/ns (max Mpfsz) * 3 (Mdest since three other chips in the system)} < Mrfr_max_learn * {750 Mbit/sec (received on 100 Mbit links) + 300 Mbit/sec (received on 10 Mbit link)} Solving for Mrfr_max_learn gives: Mrfr_max_learn = 500 Mbit/s / (1050 Mbit/s) = 0.47 So the PCI expansion bus has a transfer rate adequate to support up to 47% of the frames received being “broadcast to all chips in the system” (this could include frames that are required to be learned). EXAMPLE #3: Determine an equation that gives the maximum number of 100 Mbit and 10 Mbit ports that can be used with the PM3351 and PM3350 devices and still allows for a non- blocking switch implementation. Given: • all destination traffic is unicast |
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