PM3350-SW datasheet(165/224 Pages) PMC

165 / 224 page

ELAN 8X10

PM3350 ELAN 8 X10

DATA SHEET

PMC-970109

ISSUE 3

8 PORT ETHERNET SWITCH

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND PMC-SIERRA, INC. CUSTOMERS ONLY

163

MREG_ADDR[3:0]

Description

0x0

MCONFIG

Memory configuration register

0x1

DCONFIG

Device configuration register

0x2

SMR

SDRAM mode register (reserved)

0x3

Reserved

0x4

Reserved

0x5

MEMCTRL

Memory control/status

0x6

MSTART_l

Memory statistics collection start

0x7

MSTART_h

0x8

MSTOP_l

Memory statistics collection stop

0x9

MSTOP_h

0xA

MCCNT_l

Memory cycle count

0xB

MCCNT_h

0xC

MWCNT_l

Memory write count

0xD

MWCNT_h

0xE

MRCNT_l

Memory read count

0xF

MRCNT_h

MREG_ADDR[31:4] bits are unimplemented so must be written with zero and ignored

on reads.

Locations 0x5 through 0xF are for diagnostic purposes only.

By way of example, the following the sequence of operations are required to first read

the DCONFIG register and then write the MCONFIG register in the memory interface:

• PCI write MREG_ADDR to 0x1

expansion address for DCONFIG

• PCI read MREG_DATA

read DCONFIG register

• PCI write MREG_ADDR to 0x0

expansion address for MCONFIG

• PCI write MREG_DATA to val[15:0]

MCONFIG register written as val[15:0]

Note that the SMR, MEMCTRL, MSTART, MSTOP, MWCNT and MRCNT registers are

all reserved for factory testing, and must not be accessed during normal operation.

PM3350-SW Datasheet(PDF) 165 Page - PMC-Sierra, Inc

PM3350-SW Datasheet(HTML) 165 Page - PMC-Sierra, Inc

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