PM3350-SW datasheet(167/224 Pages) PMC

167 / 224 page

ELAN 8X10

PM3350 ELAN 8 X10

DATA SHEET

PMC-970109

ISSUE 3

8 PORT ETHERNET SWITCH

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND PMC-SIERRA, INC. CUSTOMERS ONLY

165

110

60ns EDO DRAM

111

Reserved

MTYPE2[2:0]:

Indicates the memory type associated with MCS[2]*. The encoding is the

same as MTYPE3[2:0].

MTYPE1[2:0]:

Indicates the memory type associated with MCS[1]*. The encoding is the

same as MTYPE3[2:0].

MTYPE0[2:0]:

Indicates the memory type associated with MCS[0]*. The encoding is the

same as MTYPE3[2:0].

Note 1: The default value is the logical value on the specified pin when RST* is de-

asserted.

DCONFIG (Device Configuration register)

Bit

Type

Function

Default

Bit 31 to 16

Unused

Bit 15

R/W

PCIRUN

MDATA[31]1

Bit 14

R/W

RISCRUN

MDATA[30]1

Bit 13

R/W

RSTTM

MDATA[29]1

Bit 12

R/W

IMDIS

MDATA[28]1

Bit 11

R/W

PCI3V

MDATA[27]1

Bit 10

R/W

FIRM

MDATA[26]1

Bit 9 to 6

R/W

CHIPID[3:0]

MDATA[25:22]1

Bit 5 to 0

R/W

RTCDIV[5:0]

MDATA[21:16]1

PCIRUN:

This bit selects the operating mode of the PCI interface.

If logic 1:

• the on-chip PCI interface will latch its slave base address from the

CHIPID bits of the DCONFIG register.

• the PCI COMMAND register bits for "Bus Master" and "Memory Space"

are set to logic 1, thereby allowing the device to respond to PCI memory

space accesses and to be a bus master.

If logic 0:

• the on-chip PCI interface will has a slave base address of 0x0.

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