PM7341 datasheet(46/413 Pages) PMC

46 / 413 page

PRELIMINARY

INVERSE MULTIPLEXING OVER ATM

PM7341 S/UNI-IMA-84

DATASHEET

PMC-2000223

ISSUE 4

INVERSE MULTIPLEXING OVER ATM

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Pin Name

Type

No.

Function

TSX

Input

J26

The Transmit Start of Transfer (TSX) signal is an

active high signal that marks the first cycle of a data-

block transfer on the TDAT[15:0] bus. When the

TSX signal is active, the coinciding data on the

TDAT[15:0] bus represents the in-band PHY

address.

The TSX output is sampled on the rising edge of

RCLK.

TDAT[15]

TDAT[14]

TDAT[13]

TDAT[12]

TDAT[11]

TDAT[10]

TDAT[9]

TDAT[8]

TDAT[7]

TDAT[6]

TDAT[5]

TDAT[4]

TDAT[3]

TDAT[2]

TDAT[1]

TDAT[0]

Input

H25

H26

J24

G25

H23

G26

H24

F23

F26

G24

E25

E26

F24

D25

E23

D26

The Transmit Cell Data (TDAT[15:0]) signals carry

the ATM cell octets that are transferred to the

internal cell buffer. When this interface is operating

in 8-bit mode, only TDAT[7:0] is used.

The TDAT[15:0] input bus is sampled on the rising

edge of TCLK.

TPRTY

Input

E24 The Transmit Parity (TPRTY) signal provides the

parity (programmable for odd or even parity) of the

TDAT[15:0] bus. The TPRTY signal is considered

valid only when valid data and inband address are

transferring as indicated by the TENB signal

asserted low. When this interface is operating in 8-

bit mode, this signal provides the parity of

TDAT[7:0].

A parity error is indicated by a status bit and a

maskable interrupt.

The TPRTY input signal is sampled on the rising

edge of TCLK.

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