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PM7341 Datasheet(PDF) 59 Page - PMC-Sierra, Inc |
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PM7341 Datasheet(HTML) 59 Page - PMC-Sierra, Inc |
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59 / 413 page ![]() PRELIMINARY INVERSE MULTIPLEXING OVER ATM PM7341 S/UNI-IMA-84 DATASHEET PMC-2000223 ISSUE 4 INVERSE MULTIPLEXING OVER ATM PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 61 Pin Name Type Pin No. Function DDP Input R1 The Drop Bus Data Parity (DDP) signal carries the even or odd parity for the drop bus signals. The parity calculation encompasses DDATA[7:0], DPL, and DV5 signals. The selection of even or odd parity is made via the SBI_PAR_CTL bit of SBI Extract Control Register. Multiple PHY-devices can drive this signal at uniquely assigned tributary columns within the SBI BUS structure. This parity signal is intended to detect multiple sources in the column assignment. The DDP input signal is sampled on the rising edge of REFCLK. DPL Input T2 The Active High Drop Bus Payload (DPL) is an active high signal that indicates valid data within the SBI BUS structure. This signal is asserted during all octets making up a tributary. This signal goes high during the V3 octet within a tributary to accommodate negative timing adjustments between the tributary rate and the fixed SBI BUS structure. This signal goes low during the octet after the V3 octet within a tributary to accommodate positive timing adjustments between the tributary rate and the fixed SBI BUS structure. Multiple PHY-devices can drive this signal at uniquely assigned tributary columns within the SBI BUS structure. The DPL input signal is sampled on the rising edge of REFCLK. |
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