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PM7341 Datasheet(PDF) 61 Page - PMC-Sierra, Inc |
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PM7341 Datasheet(HTML) 61 Page - PMC-Sierra, Inc |
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61 / 413 page ![]() PRELIMINARY INVERSE MULTIPLEXING OVER ATM PM7341 S/UNI-IMA-84 DATASHEET PMC-2000223 ISSUE 4 INVERSE MULTIPLEXING OVER ATM PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 63 Pin Name Type Pin No. Function ADP Tristate Output L1 The Add Bus Data Parity (ADP) signal carries the even or odd parity for the add bus signals. The parity calculation encompasses ADATA[7:0], APL and AV5 signals. The selection of even or odd parity is made via SBI_PAR_CTL bit of SBI Insert Control Register. The S/UNI-IMA-84 drives ADP only at uniquely assigned tributary columns within the SBI BUS structure. The ADP output signal is updated on the rising edge of REFCLK. APL Tristate Output K3 The Active High Add Bus Payload (APL) is an active high signal that indicates valid data within the SBI BUS structure. This active high signal is asserted during all octets making up a tributary. This signal goes high during the V3 or H3 octet within a tributary to accommodate negative timing adjustments between the tributary rate and the fixed SBI BUS structure. This signal goes low during the octet after the V3 or H3 octet within a tributary to accommodate positive timing adjustments between the tributary rate and the fixed SBI BUS structure. The S/UNI-IMA-84 drives the APL only at uniquely assigned tributary columns within the SBI BUS structure. The APL output signal is updated on the rising edge of REFCLK. |
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