PM7341 datasheet(49/413 Pages) PMC

49 / 413 page

PRELIMINARY

INVERSE MULTIPLEXING OVER ATM

PM7341 S/UNI-IMA-84

DATASHEET

PMC-2000223

ISSUE 4

INVERSE MULTIPLEXING OVER ATM

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

9.5 Microprocessor Interface (31 Signals)

Pin Name

Type

No.

Function

D[15]

D[14]

D[13]

D[12]

D[11]

D[10]

D[9]

D[8]

D[7]

D[6]

D[5]

D[4]

D[3]

D[2]

D[1]

D[0]

I/O

B19

D19

A19

C19

B18

A18

B17

C18

A17

D17

B16

A16

B15

A15

C16

B14

The Micro Data (D[15:0]) signals provide a data bus

to allow the S/UNI-IMA-84 device to interface to an

external microprocessor. Both read and write

transactions are supported. The microprocessor

interface is used to configure and monitor the S/UNI-

IMA-84 device.

A[10]

A[9]

A[8]

A[7]

A[6]

A[5]

A[4]

A[3]

A[2]

A[1]

Input

D15

A14

C15

B13

A13

C14

B12

C13

A12

B11

The Micro Address (A[10:1]) signals provide an

address bus to allow the S/UNI-IMA-84 device to

interface to an external microprocessor.

The A[10:1] indicate a word address. The S/UNI-

IMA-84 microprocessor interface is not byte

addressable.

The A[10:1] input signals are sampled while the ALE

is asserted high.

ALE

Input

C12

The Address Latch Enable (ALE) is an active high

signal that latches the A[10:1] signals during the

address phase of a bus transaction. When ALE is set

high, the address latches are transparent. When ALE

is set low, the address latches hold the address

provided on A[10:1].

The ALE input has an internal pull-up resistor.

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