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PM73487 Datasheet(PDF) 96 Page - PMC-Sierra, Inc |
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PM73487 Datasheet(HTML) 96 Page - PMC-Sierra, Inc |
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96 / 251 page ![]() PM73487 QRT PMC-Sierra, Inc. PMC-980618 Issue 3 622 Mbps ATM Traffic Management Device Released Datasheet 84 Figure 57 shows the AL RAM write timing. Symbol Parameter Signals Min Max Units Tcyc Clock period ALRAM_CLK 10 ns Tch Clock high period ALRAM_CLK 3 ns Tcl Clock low period ALRAM_CLK 3 ns Tadrsu Address setup time ALRAM_ADD(18:0), ALRAMADD17N, ALRAMADD18N 2.7 ns Tadrh Address hold time ALRAM_ADD(18:0), ALRAMADD17N, ALRAMADD18N 1.5 ns Toesu Output enable setup time /ALRAM_OE 3.5 ns Toeh Output enable hold time /ALRAM_OE -1 ns Tadss Address strobe setup time /ALRAM_ADSC 2.8 ns Tadh Address strobe hold time /ALRAM_ADSC 1.5 ns Trds (Read) Data valid required before clock ALRAM_DATA(16:0) 3.8 ns Trdh (Read) Data valid required after clock ALRAM_DATA(16:0) 1.5 ns Twesu Write enable setup time /ALRAM_WE 2.9 ns Tweh Write enable hold time /ALRAM_WE 1.2 ns Figure 57. Address Lookup RAM Write Timing 1 2 3 4 5 Tcyc Tcyc Tch Tcl Tch Tcl Tadss Tadh Toesu Toeh Tadrsu Tadrh Tadrsu Tadrh Tadrsu Tadrh Twesu Tweh Tds Tdh VALID DATA ALRAM WRITE CYCLE ALRAM_CLK ALRAM_ADSC /ALRAM_OE ALRAM_ADD(18:0) ALRAMADD17N ALRAMADD18N ALRAM_WE ALRAM_DATA(16:0) |
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