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PM73487 Datasheet(PDF) 97 Page - PMC-Sierra, Inc

Part # PM73487
Description  622 Mbps ATM Traffic Management Device
PDF  251 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM73487 Datasheet(HTML) 97 Page - PMC-Sierra, Inc

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PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATM Traffic Management Device
Released
Datasheet
85
Figure 58 shows the channel RAM read timing.
Symbol
Parameter
Signals
Min
Max
Units
Tcyc
Clock period
ALRAM_CLK
10
ns
Tch
Clock high period
ALRAM_CLK
3
ns
Tcl
Clock low period
ALRAM_CLK
3
ns
Tadrsu
Address setup time
ALRAM_ADD(18:0),
ALRAMADD17N,
ALRAMADD18N
2.7
ns
Tadrh
Address hold time
ALRAM_ADD(18:0),
ALRAMADD17N,
ALRAMADD18N
1.5
ns
Toesu
Output enable setup time
/ALRAM_OE
3.5
ns
Toeh
Output enable hold time
/ALRAM_OE
-1
ns
Tadss
Address strobe setup time
/ALRAM_ADSC
2.8
ns
Tadh
Address strobe hold time
/ALRAM_ADSC
1.5
ns
Tds
(Write) Data valid before clock
ALRAM_DATA(16:0)
2.6
ns
Tdh
(Write) Data valid after clock
ALRAM_DATA(16:0)
1.5
ns
Twesu
Write enable setup time
/ALRAM_WE
2.9
ns
Tweh
Write enable hold time
/ALRAM_WE
1.2
ns
Figure 58. Channel RAM Read Timing
1
2
3
4
5
Tcyc
Tcyc
Tch
Tcl
Tch
Tcl
Tadss
Tadh
Toesu
Toeh
Tas
Tah
Tas
Tah
Twesu
Tweh
Trds
Trdh
Trds
Trdh
Trds
Trdh
VALID DATA
CHRAM READ CYCLE
CH_RAM_CLK
/CH_RAM_ADSC
/CH_RAM_OE
CH_RAM_ADD(17:0)
CH_RAM_ADD17N
/CH_RAM_WE
CH_RAM_DATA(31:0)
CH_RAM_PARITY0
CH_RAM_PARITY1



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