46 / 73 page
CYRF69103
Document #: 001-07611 Rev *B
Page 46 of 73
0E
P11CR
Reserved
Int Enable
Int Act Low
Reserved
Open Drain
Reserved
Output
Enable
-bb--b-b
00000000
0F
P12CR
CLK Output
Int Enable
Int Act Low
TTL
Threshold
Reserved
Open Drain
Pull-up
Enable
Output
Enable
bbbb-bbb
00000000
10
P13CR
Reserved
Int Enable
Int Act Low
Reserved
High Sink
Open Drain
Pull-up
Enable
Output
Enable
-bb-bbbb
00000000
11–13
P14CR–
P16CR
SPI Use
Int Enable
Int Act Low
Reserved
High Sink
Open Drain
Pull-up
Enable
Output
Enable
bbb-bbbb
00000000
14
P17CR
Reserved
Int Enable
Int Act Low
Reserved
High Sink
Open Drain
Pull-up
Enable
Output
Enable
-bb-bbbb
00000000
15
P2CR
Reserved
Int Enable
Int Act Low
TTL Thresh
High Sink
Open Drain
Pull-up
Enable
Output
Enable
-bbbbbbb
00000000
20
FRTMRL
Free-Running Timer [7:0]
bbbbbbbb
00000000
21
FRTMRH
Free-Running Timer [15:8]
bbbbbbbb
00000000
26
PITMRL
Prog Interval Timer [7:0]
rrrrrrrr
00000000
27
PITMRH
Reserved
Prog Interval Timer [11:8]
----rrrr
00000000
28
PIRL
Prog Interval [7:0]
bbbbbbbb
00000000
29
PIRH
Reserved
Prog Interval [11:8]
----rrrr
00000000
30
CPUCLKCR
Reserved
CPU
CLK Select
Reserved to
0.
-------b
00000000
31
TMRCLKCR
TCAPCLK Divider
TCAPCLK Select
ITMRCLK Divider
ITMRCLK Select
bbbbbbbb
10001111
34
IOSCTR
foffset[2:0]
Gain[4:0]
bbbbbbbb
000ddddd
36
LPOSCTR
32-kHz Low
Power
Reserved
32-kHz Bias Trim [1:0]
32-kHz Freq Trim [3:0]
0-bbbbbb
d-dddddd
3C
SPIDATA
SPIData[7:0]
bbbbbbbb
00000000
3D
SPICR
Swap
LSB First
Comm Mode
CPOL
CPHA
SCLK Select
bbbbbbbb
00000000
DA
INT_CLR0
GPIO Port 1 Sleep Timer
INT1
GPIO Port 0
SPI Receive
SPI Transmit
Reserved
POR/LVD
bbbbbb-b
00000000
DB
INT_CLR1
Reserved
Prog Interval
Timer
1-ms Timer
Reserved
-bb-----
00000000
DC
INT_CLR2
Reserved
Reserved
Reserved
GPIO Port 2
Reserved
INT2
16-bit
Counter
Wrap
Reserved
---b-bb-
00000000
DE
INT_MSK3
ENSWINT
Reserved
r-------
00000000
DF
INT_MSK2
Reserved
Reserved
Reserved
GPIO Port 2
Int Enable
Reserved
INT2
Int Enable
16-bit
Counter
Wrap Int
Enable
Reserved
---b-bb-
00000000
E1
INT_MSK1
Reserved
Prog Interval
Timer
Int Enable
1-ms Timer
Int Enable
Reserved
-bb-----
00000000
E0
INT_MSK0 GPIO Port 1
Int Enable
Sleep Timer
Int Enable
INT1
Int Enable
GPIO Port 0
Int Enable
SPI Receive
Int Enable
SPI Transmit
Int Enable
Reserved
POR/LVD
Int Enable
bbbbbb-b
00000000
E2
INT_VC
Pending Interrupt [7:0]
bbbbbbbb
00000000
E3
RESWDT
Reset Watchdog Timer [7:0]
wwwwwww
w
00000000
--
CPU_A
Temporary Register T1 [7:0]
--------
00000000
--
CPU_X
X[7:0]
--------
00000000
--
CPU_PCL
Program Counter [7:0]
--------
00000000
--
CPU_PCH
Program Counter [15:8]
--------
00000000
--
CPU_SP
Stack Pointer [7:0]
--------
00000000
F7
CPU_F
Reserved
XIO
Super
Carry
Zero
Global IE
---brbbb
00000010
FF
CPU_SCR
GIES
Reserved
WDRS
PORS
Sleep
Reserved
Reserved
Stop
r-ccb--b
00010100
1E0
OSC_CR0
Reserved
No Buzz
Sleep Timer [1:0]
CPU Speed [2:0]
--bbbbbb
00000000
1E3
LVDCR
Reserved
PORLEV[1:0]
Reserved
VM[2:0]
--bb-bbb
00000000
1EB
ECO_TR
Sleep Duty Cycle [1:0]
Reserved
bb------
00000000
1E4
VLTCMP
Reserved
LVD
PPOR
------rr
00000000
Microcontroller Function Register Summary (continued)
Addr
Name
7
6
5
4
3
2
1
0
R/W
Default
[+] Feedback
[+] Feedback
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
