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TMPR3911 Datasheet(PDF) 102 Page - Toshiba Semiconductor |
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TMPR3911 Datasheet(HTML) 102 Page - Toshiba Semiconductor |
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102 / 462 page ![]() Chapter 4 BIU Module 4-2 4.1.1 Block Diagram Output Data Ack DRAM Control SDRAM Control Addr[31:0] ByteEn Halted HaltCycle Halt BusError CS3-CS0 MCS3-MCS0 Card Control Start Read Write Burst BurstLen WrInPage A[12:0] D[31:0] Input Data Memory State Machine Chip Select Controller Address Decoder Arbitrator Output Data Path Input Data Path DRAM & SDRAM Controller Figure 4.1.1 BIU Block Diagram |
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